diff options
author | Joerg Roedel <joerg.roedel@amd.com> | 2012-03-15 16:29:47 +0100 |
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committer | Joerg Roedel <joerg.roedel@amd.com> | 2012-03-15 16:31:03 +0100 |
commit | 9ddd592a191b32f2ee6c4b6ed2bd52665c3a49f5 (patch) | |
tree | 75fb37f8bbe142ab07e28eafeee7d356dd31077b | |
parent | cebd5fa4d3046d5b43ce1836a0120612822a7fb0 (diff) | |
download | blackbird-op-linux-9ddd592a191b32f2ee6c4b6ed2bd52665c3a49f5.tar.gz blackbird-op-linux-9ddd592a191b32f2ee6c4b6ed2bd52665c3a49f5.zip |
iommu/amd: Make sure IOMMU interrupts are re-enabled on resume
Unfortunatly the interrupts for the event log and the
peripheral page-faults are only enabled at boot but not
re-enabled at resume. Fix that.
Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
-rw-r--r-- | drivers/iommu/amd_iommu_init.c | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 526652a7385d..182b80ba79c5 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -1123,8 +1123,9 @@ static int iommu_setup_msi(struct amd_iommu *iommu) { int r; - if (pci_enable_msi(iommu->dev)) - return 1; + r = pci_enable_msi(iommu->dev); + if (r) + return r; r = request_threaded_irq(iommu->dev->irq, amd_iommu_int_handler, @@ -1134,27 +1135,36 @@ static int iommu_setup_msi(struct amd_iommu *iommu) if (r) { pci_disable_msi(iommu->dev); - return 1; + return r; } iommu->int_enabled = true; - iommu_feature_enable(iommu, CONTROL_EVT_INT_EN); - - if (iommu->ppr_log != NULL) - iommu_feature_enable(iommu, CONTROL_PPFINT_EN); return 0; } static int iommu_init_msi(struct amd_iommu *iommu) { + int ret; + if (iommu->int_enabled) - return 0; + goto enable_faults; if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI)) - return iommu_setup_msi(iommu); + ret = iommu_setup_msi(iommu); + else + ret = -ENODEV; - return 1; + if (ret) + return ret; + +enable_faults: + iommu_feature_enable(iommu, CONTROL_EVT_INT_EN); + + if (iommu->ppr_log != NULL) + iommu_feature_enable(iommu, CONTROL_PPFINT_EN); + + return 0; } /**************************************************************************** |