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| author | Ben Skeggs <bskeggs@redhat.com> | 2011-05-24 14:37:41 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2011-06-23 15:57:07 +1000 |
| commit | 847adea2c701b519b43d8c958c5082a22eeba346 (patch) | |
| tree | a16bdc1fd3bc21d98a712ece351ab129f2497658 | |
| parent | 068da16198ad09343b0c3647d26f81683921bc84 (diff) | |
| download | blackbird-op-linux-847adea2c701b519b43d8c958c5082a22eeba346.tar.gz blackbird-op-linux-847adea2c701b519b43d8c958c5082a22eeba346.zip | |
drm/nvc0/gr: macro to determine fermi class, will use it in a few places
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.h | 22 |
2 files changed, 29 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c index ca6db204d644..a57fba3da941 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.c +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c @@ -675,13 +675,10 @@ nvc0_graph_create(struct drm_device *dev) struct drm_nouveau_private *dev_priv = dev->dev_private; struct nvc0_graph_priv *priv; int ret, gpc, i; + u32 fermi; - switch (dev_priv->chipset) { - case 0xc0: - case 0xc3: - case 0xc4: - break; - default: + fermi = nvc0_graph_class(dev); + if (!fermi) { NV_ERROR(dev, "PGRAPH: unsupported chipset, please report!\n"); return 0; } @@ -770,6 +767,10 @@ nvc0_graph_create(struct drm_device *dev) NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */ NVOBJ_MTHD (dev, 0x9039, 0x0500, nvc0_graph_mthd_page_flip); NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */ + if (fermi >= 0x9197) + NVOBJ_CLASS(dev, 0x9197, GR); /* 3D (NVC1-) */ + if (fermi >= 0x9297) + NVOBJ_CLASS(dev, 0x9297, GR); /* 3D (NVC8-) */ NVOBJ_CLASS(dev, 0x90c0, GR); /* COMPUTE */ return 0; diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.h b/drivers/gpu/drm/nouveau/nvc0_graph.h index f5d184e0689d..2b667d4e88ca 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.h +++ b/drivers/gpu/drm/nouveau/nvc0_graph.h @@ -72,4 +72,26 @@ struct nvc0_graph_chan { int nvc0_grctx_generate(struct nouveau_channel *); +/* nvc0_graph.c uses this also to determine supported chipsets */ +static inline u32 +nvc0_graph_class(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + switch (dev_priv->chipset) { + case 0xc0: + case 0xc3: + case 0xc4: + return 0x9097; +#if 0 + case 0xc1: + return 0x9197; + case 0xc8: + return 0x9297; +#endif + default: + return 0; + } +} + #endif |
