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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2013-02-10 13:18:42 +0530
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2013-03-28 12:55:59 +0530
commit466caec026e38df1a3dda117ac90ccc82b8d3f14 (patch)
tree1c5374959de6997240276f70a08ffa65dbfd274c
parent4df9c29bf6eec23e99e83c9e1531603af69b4b42 (diff)
downloadblackbird-op-linux-466caec026e38df1a3dda117ac90ccc82b8d3f14.tar.gz
blackbird-op-linux-466caec026e38df1a3dda117ac90ccc82b8d3f14.zip
ARM: OMAP4+: Remove un-necessary cacheflush in secondary CPU boot path
This was borrowed from ARM versatile code with pen_release mechanism but since OMAP uses hardware register based synchronisation, pen_release stuff was dropped. Unfortunately the cacheflush wasn't dropped along with it. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
-rw-r--r--arch/arm/mach-omap2/omap-smp.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index d9727218dd0a..5d8f2497017e 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -21,7 +21,6 @@
#include <linux/io.h>
#include <linux/irqchip/arm-gic.h>
-#include <asm/cacheflush.h>
#include <asm/smp_scu.h>
#include "omap-secure.h"
@@ -103,9 +102,6 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *
else
__raw_writel(0x20, base + OMAP_AUX_CORE_BOOT_0);
- flush_cache_all();
- smp_wmb();
-
if (!cpu1_clkdm)
cpu1_clkdm = clkdm_lookup("mpu1_clkdm");
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