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| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2012-03-08 10:40:08 +0200 |
|---|---|---|
| committer | Liam Girdwood <lrg@ti.com> | 2012-03-12 13:34:23 +0000 |
| commit | 33cec399048545c64d9b9a1368b968acee8acb35 (patch) | |
| tree | 3933414fd36ccc90a7da1ef45844ff65a81559fc | |
| parent | 40c0764b18342f2e99e92779330cb4612a971420 (diff) | |
| download | blackbird-op-linux-33cec399048545c64d9b9a1368b968acee8acb35.tar.gz blackbird-op-linux-33cec399048545c64d9b9a1368b968acee8acb35.zip | |
ARM/ASoC: OMAP McBSP: Move remainig defines from arch to ASoC header
Clock signal muxing, and functional clock related defines are only needed
in ASoC drivers.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Mark Brown <broonoie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@ti.com>
| -rw-r--r-- | arch/arm/plat-omap/include/plat/mcbsp.h | 12 | ||||
| -rw-r--r-- | sound/soc/omap/mcbsp.h | 12 |
2 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 8eb9b0e7a852..18814127809a 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -31,18 +31,6 @@ #define MCBSP_CONFIG_TYPE3 0x3 #define MCBSP_CONFIG_TYPE4 0x4 -/* CLKR signal muxing options */ -#define CLKR_SRC_CLKR 0 -#define CLKR_SRC_CLKX 1 - -/* FSR signal muxing options */ -#define FSR_SRC_FSR 0 -#define FSR_SRC_FSX 1 - -/* McBSP functional clock sources */ -#define MCBSP_CLKS_PRCM_SRC 0 -#define MCBSP_CLKS_PAD_SRC 1 - /* Platform specific configuration */ struct omap_mcbsp_ops { void (*request)(unsigned int); diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h index a5518d71913f..acc94700f5b7 100644 --- a/sound/soc/omap/mcbsp.h +++ b/sound/soc/omap/mcbsp.h @@ -230,6 +230,18 @@ enum { #define XRDYEN BIT(10) #define XEMPTYEOFEN BIT(14) +/* CLKR signal muxing options */ +#define CLKR_SRC_CLKR 0 +#define CLKR_SRC_CLKX 1 + +/* FSR signal muxing options */ +#define FSR_SRC_FSR 0 +#define FSR_SRC_FSX 1 + +/* McBSP functional clock sources */ +#define MCBSP_CLKS_PRCM_SRC 0 +#define MCBSP_CLKS_PAD_SRC 1 + /* we don't do multichannel for now */ struct omap_mcbsp_reg_cfg { u16 spcr2; |
