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authorPhilipp Zabel <philipp.zabel@gmail.com>2008-07-10 02:16:27 +0200
committerSamuel Ortiz <samuel@sortiz.org>2008-07-20 19:56:24 +0200
commit279cac484e55317456900fe3567c7cb5bd46fd5f (patch)
tree2a2c04fca6970dee9831c60496615cb4f753d9c9
parent4a67b528e0be5d855b1a7bb71ec769d954765f6c (diff)
downloadblackbird-op-linux-279cac484e55317456900fe3567c7cb5bd46fd5f.tar.gz
blackbird-op-linux-279cac484e55317456900fe3567c7cb5bd46fd5f.zip
mfd: remove DS1WM register definitions from asic3.h
There is a dedicated ds1wm driver, no need to duplicate this information here. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@openedhand.com>
-rw-r--r--include/linux/mfd/asic3.h38
1 files changed, 3 insertions, 35 deletions
diff --git a/include/linux/mfd/asic3.h b/include/linux/mfd/asic3.h
index 0eae3083da43..8f8c46c41f44 100644
--- a/include/linux/mfd/asic3.h
+++ b/include/linux/mfd/asic3.h
@@ -265,44 +265,12 @@ struct asic3_platform_data {
#define ASIC3_EXTCF_CF_SLEEP (1 << 15) /* CF sleep mode control */
/*********************************************
- * The Onewire interface registers
- *
- * OWM_CMD
- * OWM_DAT
- * OWM_INTR
- * OWM_INTEN
- * OWM_CLKDIV
+ * The Onewire interface (DS1WM) is handled
+ * by the ds1wm driver.
*
*********************************************/
-#define ASIC3_OWM_Base 0xC00
-
-#define ASIC3_OWM_CMD 0x00
-#define ASIC3_OWM_DAT 0x04
-#define ASIC3_OWM_INTR 0x08
-#define ASIC3_OWM_INTEN 0x0C
-#define ASIC3_OWM_CLKDIV 0x10
-
-#define ASIC3_OWM_CMD_ONEWR (1 << 0)
-#define ASIC3_OWM_CMD_SRA (1 << 1)
-#define ASIC3_OWM_CMD_DQO (1 << 2)
-#define ASIC3_OWM_CMD_DQI (1 << 3)
-
-#define ASIC3_OWM_INTR_PD (1 << 0)
-#define ASIC3_OWM_INTR_PDR (1 << 1)
-#define ASIC3_OWM_INTR_TBE (1 << 2)
-#define ASIC3_OWM_INTR_TEMP (1 << 3)
-#define ASIC3_OWM_INTR_RBF (1 << 4)
-
-#define ASIC3_OWM_INTEN_EPD (1 << 0)
-#define ASIC3_OWM_INTEN_IAS (1 << 1)
-#define ASIC3_OWM_INTEN_ETBE (1 << 2)
-#define ASIC3_OWM_INTEN_ETMT (1 << 3)
-#define ASIC3_OWM_INTEN_ERBF (1 << 4)
-
-#define ASIC3_OWM_CLKDIV_PRE (3 << 0) /* two bits wide at bit 0 */
-#define ASIC3_OWM_CLKDIV_DIV (7 << 2) /* 3 bits wide at bit 2 */
-
+#define ASIC3_OWM_BASE 0xC00
/*****************************************************************************
* The SD configuration registers are at a completely different location
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