Patch set to for VESNIN server support

Signed-off-by: Artem Senichev <a.senichev@yadro.com>

8 files changed, 508 insertions, 0 deletions

diff --git a/openpower/patches/vesnin-patches/hostboot/hostboot-0001-Increase-default-watchdog-timeout-to-300-seconds.patch b/openpower/patches/vesnin-patches/hostboot/hostboot-0001-Increase-default-watchdog-timeout-to-300-seconds.patch
new file mode 100644
index 00000000..b1d816a6
--- /dev/null
+++ b/openpower/patches/vesnin-patches/hostboot/hostboot-0001-Increase-default-watchdog-timeout-to-300-seconds.patch
@@ -0,0 +1,29 @@
+From a4259b9799ebb0f31223d52def871f4851217315 Mon Sep 17 00:00:00 2001
+From: Artem Senichev <a.senichev@yadro.com>
+Date: Tue, 13 Mar 2018 14:50:56 +0300
+Subject: [PATCH] Increase default watchdog timeout to 300 seconds
+
+We need more than 2 minutes to go through some IPL, for instance
+step "13.10 mss_draminit_trainadv" tooks 215 seconds to initialize 8 TiB RAM.
+
+Signed-off-by: Artem Senichev <a.senichev@yadro.com>
+---
+ src/include/usr/ipmi/ipmiwatchdog.H | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/include/usr/ipmi/ipmiwatchdog.H b/src/include/usr/ipmi/ipmiwatchdog.H
+index d730e6bc4..37f73624b 100644
+--- a/src/include/usr/ipmi/ipmiwatchdog.H
++++ b/src/include/usr/ipmi/ipmiwatchdog.H
+@@ -58,7 +58,7 @@ namespace IPMIWATCHDOG
+ #ifdef CONFIG_BMC_IPMI_LONG_WATCHDOG
+ const uint16_t  DEFAULT_WATCHDOG_COUNTDOWN = 2400;
+ #else
+-const uint16_t  DEFAULT_WATCHDOG_COUNTDOWN = 120;
++const uint16_t  DEFAULT_WATCHDOG_COUNTDOWN = 300;
+ #endif
+ 
+ /**
+-- 
+2.14.1
+
diff --git a/openpower/patches/vesnin-patches/hostboot/hostboot-0002-Fix-POS-and-SPD-VPD_REC_NUM.patch b/openpower/patches/vesnin-patches/hostboot/hostboot-0002-Fix-POS-and-SPD-VPD_REC_NUM.patch
new file mode 100644
index 00000000..aa851e49
--- /dev/null
+++ b/openpower/patches/vesnin-patches/hostboot/hostboot-0002-Fix-POS-and-SPD-VPD_REC_NUM.patch
@@ -0,0 +1,28 @@
+From 1dcf087af57a93ec7f24aa8be73e7ff0ffad22ca Mon Sep 17 00:00:00 2001
+From: Artem Senichev <a.senichev@yadro.com>
+Date: Tue, 13 Mar 2018 15:03:41 +0300
+Subject: [PATCH] Fix POS and SPD-VPD_REC_NUM
+
+Originally created by MSI (S188)
+
+Signed-off-by: Artem Senichev <a.senichev@yadro.com>
+---
+ src/usr/targeting/common/Targets.pm | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/usr/targeting/common/Targets.pm b/src/usr/targeting/common/Targets.pm
+index 35f08428c..4eaba16e7 100644
+--- a/src/usr/targeting/common/Targets.pm
++++ b/src/usr/targeting/common/Targets.pm
+@@ -744,7 +744,7 @@ sub processMcs
+                         $self->setAttribute($dimm,"MBA_PORT",$port_num);
+                         $self->setAttribute($dimm,"MBA_DIMM",$dimm_num);
+ 
+-                        my $aff_pos=16*$proc+$mcs*$self->{MAX_MCS}+4*$mba+
++                        my $aff_pos=64*$proc+$mcs*$self->{MAX_MCS}+4*$mba+
+                                     2*$port_num+$dimm_num;
+                         $self->setAttribute($dimm, "AFFINITY_PATH",
+                             $parent_affinity
+-- 
+2.14.1
+
diff --git a/openpower/patches/vesnin-patches/hostboot/hostboot-0003-Add-present-bits-info-based-on-pos.patch b/openpower/patches/vesnin-patches/hostboot/hostboot-0003-Add-present-bits-info-based-on-pos.patch
new file mode 100644
index 00000000..02decc4a
--- /dev/null
+++ b/openpower/patches/vesnin-patches/hostboot/hostboot-0003-Add-present-bits-info-based-on-pos.patch
@@ -0,0 +1,97 @@
+From e89b453239c0b087e5f61aefa59d29a1ae636e08 Mon Sep 17 00:00:00 2001
+From: Artem Senichev <a.senichev@yadro.com>
+Date: Tue, 13 Mar 2018 15:14:49 +0300
+Subject: [PATCH] Add present bits info based on pos
+
+Originally created by MSI (S188)
+
+Signed-off-by: Artem Senichev <a.senichev@yadro.com>
+---
+ src/usr/hwas/hostbootIstep.C | 52 ++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 52 insertions(+)
+
+diff --git a/src/usr/hwas/hostbootIstep.C b/src/usr/hwas/hostbootIstep.C
+index af3770295..2dc73f383 100644
+--- a/src/usr/hwas/hostbootIstep.C
++++ b/src/usr/hwas/hostbootIstep.C
+@@ -188,6 +188,12 @@ void* host_discover_targets( void *io_pArgs )
+ 
+     // Put out some helpful messages that show which targets we actually found
+     std::map<TARGETING::TYPE,uint64_t> l_presData;
++    std::map<TARGETING::TYPE,uint64_t> Present_Dimm_P0; //for dimms on CPU P0
++    std::map<TARGETING::TYPE,uint64_t> Present_Dimm_P1; //for dimms on CPU P1
++    std::map<TARGETING::TYPE,uint64_t> Present_Dimm_P2; //for dimms on CPU P2
++    std::map<TARGETING::TYPE,uint64_t> Present_Dimm_P3; //for dimms on CPU P3
++    TARGETING::TYPE l_type_dimm;
++
+     for (TargetIterator target = targetService().begin();
+          target != targetService().end();
+          ++target)
+@@ -198,11 +204,50 @@ void* host_discover_targets( void *io_pArgs )
+         }
+         TARGETING::TYPE l_type = target->getAttr<TARGETING::ATTR_TYPE>();
+         TARGETING::ATTR_POSITION_type l_pos = 0;
++        TARGETING::ATTR_HUID_type l_huid = target->getAttr<TARGETING::ATTR_HUID>(); //for showing HUID
++
+         if( target->tryGetAttr<TARGETING::ATTR_POSITION>(l_pos) )
+         {
+             l_presData[l_type] |= (0x8000000000000000 >> l_pos);
++
++            if (l_type == 0x03 ) //if the type is DIMM
++            {
++                l_type_dimm = l_type;
++                if (l_pos < 64 )
++                {
++                    //for dimms on CPU P0
++                    Present_Dimm_P0[l_type] |= (0x8000000000000000 >> l_pos);
++                    CONSOLE::displayf(NULL, "MEMORY-INFO| l_pos = 0x%X, l_type =0x%0X, l_huid=0x%X, Present_Dimm_P0[l_type]=%.8X%.8X", l_pos, l_type, l_huid, Present_Dimm_P0[l_type] >> 32, Present_Dimm_P0[l_type] & 0xFFFFFFFF);
++                }
++                else if ((l_pos >= 64) && (l_pos < 128))
++                {
++                    //for dimms on CPU P1
++                    Present_Dimm_P1[l_type] |= (0x8000000000000000 >> (l_pos - 64));
++                    CONSOLE::displayf(NULL, "MEMORY-INFO| l_pos = 0x%X, l_type =0x%0X, l_huid=0x%X, Present_Dimm_P1[l_type]=%.8X%.8X", l_pos, l_type, l_huid, Present_Dimm_P1[l_type] >> 32, Present_Dimm_P1[l_type] & 0xFFFFFFFF);
++                }
++                else if ((l_pos >= 128) && (l_pos < 192))
++                {
++                    //for dimms on CPU P2
++                    Present_Dimm_P2[l_type] |= (0x8000000000000000 >> (l_pos - 128));
++                    CONSOLE::displayf(NULL, "MEMORY-INFO| l_pos = 0x%X, l_type =0x%0X, l_huid=0x%X, Present_Dimm_P2[l_type]=%.8X%.8X", l_pos, l_type, l_huid, Present_Dimm_P2[l_type] >> 32, Present_Dimm_P2[l_type] & 0xFFFFFFFF);
++                }
++                else if (l_pos >= 192)
++                {
++                    //for dimms on CPU P3
++                    Present_Dimm_P3[l_type] |= (0x8000000000000000 >> (l_pos - 192));
++                    CONSOLE::displayf(NULL, "MEMORY-INFO| l_pos = 0x%X, l_type =0x%0X, l_huid=0x%X, Present_Dimm_P3[l_type]=%.8X%.8X", l_pos, l_type, l_huid, Present_Dimm_P3[l_type] >> 32, Present_Dimm_P3[l_type] & 0xFFFFFFFF);
++                }
++            }
+         }
+     }
++
++    CONSOLE::displayf("HWAS", "=========================================");
++    CONSOLE::displayf("HWAS", "PRESENT> DIMM_P0[03]=%.8X%.8X", Present_Dimm_P0[l_type_dimm] >> 32, Present_Dimm_P0[l_type_dimm] & 0xFFFFFFFF);
++    CONSOLE::displayf("HWAS", "PRESENT> DIMM_P1[03]=%.8X%.8X", Present_Dimm_P1[l_type_dimm] >> 32, Present_Dimm_P1[l_type_dimm] & 0xFFFFFFFF);
++    CONSOLE::displayf("HWAS", "PRESENT> DIMM_P2[03]=%.8X%.8X", Present_Dimm_P2[l_type_dimm] >> 32, Present_Dimm_P2[l_type_dimm] & 0xFFFFFFFF);
++    CONSOLE::displayf("HWAS", "PRESENT> DIMM_P3[03]=%.8X%.8X", Present_Dimm_P3[l_type_dimm] >> 32, Present_Dimm_P3[l_type_dimm] & 0xFFFFFFFF);
++    CONSOLE::displayf("HWAS", "=========================================");
++
+     TARGETING::EntityPath l_epath; //use EntityPath's translation functions
+     for( std::map<TARGETING::TYPE,uint64_t>::iterator itr = l_presData.begin();
+          itr != l_presData.end();
+@@ -210,6 +255,13 @@ void* host_discover_targets( void *io_pArgs )
+     {
+         uint8_t l_type = itr->first;
+         uint64_t l_val = itr->second;
++
++        if (l_type == 0x03)
++        {
++            //to skip DIMM type
++            continue;
++        }
++
+         TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"PRESENT> %s[%.2X]=%.8X%.8X",
+                 l_epath.pathElementTypeAsString(itr->first), l_type, l_val>>32, l_val&0xFFFFFFFF);
+ #if (!defined(CONFIG_CONSOLE_OUTPUT_TRACE) && defined(CONFIG_CONSOLE))
+-- 
+2.14.1
+
diff --git a/openpower/patches/vesnin-patches/hostboot/hostboot-0004-Force-print-MCS-grouping-info-to-console.patch b/openpower/patches/vesnin-patches/hostboot/hostboot-0004-Force-print-MCS-grouping-info-to-console.patch
new file mode 100644
index 00000000..9744e1df
--- /dev/null
+++ b/openpower/patches/vesnin-patches/hostboot/hostboot-0004-Force-print-MCS-grouping-info-to-console.patch
@@ -0,0 +1,113 @@
+From 9eea226dc3be928ae297ff2d7284a43f8e43efac Mon Sep 17 00:00:00 2001
+From: Artem Senichev <a.senichev@yadro.com>
+Date: Tue, 13 Mar 2018 15:32:45 +0300
+Subject: [PATCH] Force print MCS grouping info to console
+
+Used to dump interleave mode state.
+
+Signed-off-by: Artem Senichev <a.senichev@yadro.com>
+---
+ .../mc_config/mss_eff_config/mss_eff_grouping.C    | 25 +++++++++++++---------
+ 1 file changed, 15 insertions(+), 10 deletions(-)
+
+diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C
+index 98f76cd0a..fa4c78f72 100644
+--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C
++++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C
+@@ -85,6 +85,12 @@
+ #include <mss_eff_grouping.H>
+ #include <cen_scom_addresses.H>
+ #include <mss_error_support.H>
++#include <console/consoleif.H>
++
++#define GRP_TRACE(_fmt_, _args_...) { \
++    CONSOLE::displayf(NULL, "GROUP-INFO| " _fmt_, ##_args_); \
++    CONSOLE::flush(); \
++}
+ 
+ extern "C"
+ {
+@@ -900,10 +906,10 @@ void grouping_group4McsPerGroup(const EffGroupingMemInfo & i_memInfo,
+     {
+         if (config4_gp[i] && config4_gp[i + 1])
+         {
+-            FAPI_INF("mss_eff_grouping: Grouped MCSs %u, %u, %u, %u",
++            GRP_TRACE("mss_eff_grouping: Grouped MCSs %u, %u, %u, %u",
+                      CFG_4MCS[i][0], CFG_4MCS[i][1],
+                      CFG_4MCS[i][2], CFG_4MCS[i][3]);
+-            FAPI_INF("mss_eff_grouping: Grouped MCSs %u, %u, %u, %u",
++            GRP_TRACE("mss_eff_grouping: Grouped MCSs %u, %u, %u, %u",
+                      CFG_4MCS[i + 1][0], CFG_4MCS[i + 1][1],
+                      CFG_4MCS[i + 1][2], CFG_4MCS[1 + 1][3]);
+             gp1 = i;
+@@ -919,7 +925,7 @@ void grouping_group4McsPerGroup(const EffGroupingMemInfo & i_memInfo,
+         {
+             if (config4_gp[i])
+             {
+-                FAPI_INF("mss_eff_grouping: Grouped MCSs %u, %u, %u, %u",
++                GRP_TRACE("mss_eff_grouping: Grouped MCSs %u, %u, %u, %u",
+                          CFG_4MCS[i][0], CFG_4MCS[i][1],
+                          CFG_4MCS[i][2], CFG_4MCS[i][3]);
+                 gp1 = i;
+@@ -1024,7 +1030,7 @@ void grouping_group2McsPerGroup(const EffGroupingMemInfo & i_memInfo,
+         {
+             // These 2 MCSs are not already grouped and have the same amount of
+             // memory
+-            FAPI_INF("mss_eff_grouping: Grouped MCSs %u and %u", pos, pos + 1);
++            GRP_TRACE("mss_eff_grouping: Grouped MCSs %u and %u", pos, pos + 1);
+             o_groupData.iv_data[g][MCS_SIZE] = i_memInfo.iv_mcsSize[pos];
+             o_groupData.iv_data[g][MCS_IN_GROUP] = 2;
+             o_groupData.iv_data[g][GROUP_SIZE] = 2 * i_memInfo.iv_mcsSize[pos];
+@@ -1084,7 +1090,7 @@ void grouping_group2McsPerGroup_oddpair(const EffGroupingMemInfo & i_memInfo,
+         {
+             // These 2 MCSs are not already grouped and have the same amount of
+             // memory
+-            FAPI_INF("mss_eff_grouping: Grouped MCSs %u and %u", pos, pos + 1);
++            GRP_TRACE("mss_eff_grouping: Grouped MCSs %u and %u", pos, pos + 1);
+             o_groupData.iv_data[g][MCS_SIZE] = i_memInfo.iv_mcsSize[pos];
+             o_groupData.iv_data[g][MCS_IN_GROUP] = 2;
+             o_groupData.iv_data[g][GROUP_SIZE] = 2 * i_memInfo.iv_mcsSize[pos];
+@@ -1145,7 +1151,7 @@ void grouping_group2McsPerGroup_usecase(const EffGroupingMemInfo & i_memInfo,
+             {
+                 // These 2 MCSs are not already grouped and have the same amount of
+                 // memory
+-                FAPI_INF("mss_eff_grouping: Grouped MCSs %u and %u", pos, var);
++                GRP_TRACE("mss_eff_grouping: Grouped MCSs %u and %u", pos, var);
+                 o_groupData.iv_data[g][MCS_SIZE] = i_memInfo.iv_mcsSize[pos];
+                 o_groupData.iv_data[g][MCS_IN_GROUP] = 2;
+                 o_groupData.iv_data[g][GROUP_SIZE] = 2 * i_memInfo.iv_mcsSize[pos];
+@@ -1199,7 +1205,7 @@ void grouping_group1McsPerGroup(const EffGroupingMemInfo & i_memInfo,
+             (i_memInfo.iv_mcsSize[pos] != 0))
+         {
+             // This MCS is not already grouped and has memory
+-            FAPI_INF("mss_eff_grouping: MCS %u grouped", pos);
++            GRP_TRACE("mss_eff_grouping: MCS %u grouped", pos);
+             o_groupData.iv_data[g][MCS_SIZE] = i_memInfo.iv_mcsSize[pos];
+             o_groupData.iv_data[g][MCS_IN_GROUP] = 1;
+             o_groupData.iv_data[g][GROUP_SIZE] = i_memInfo.iv_mcsSize[pos];
+@@ -1564,12 +1570,11 @@ void grouping_traceData(const EffGroupingSysAttrs & i_sysAttrs,
+ {
+     for (uint8_t i = 0; i < i_groupData.iv_numGroups; i++)
+     {
+-        FAPI_INF("mss_eff_grouping: Group %u, MCS Size %u GB, "
++        GRP_TRACE("mss_eff_grouping: Group %u, MCS Size %u GB, "
+                  "Num MCSs %u, GroupSize %u GB", i,
+                  i_groupData.iv_data[i][MCS_SIZE],
+                  i_groupData.iv_data[i][MCS_IN_GROUP],
+                  i_groupData.iv_data[i][GROUP_SIZE]);
+-
+         FAPI_INF("mss_eff_grouping: Group %u, Base Add 0x%08x", i,
+                  i_groupData.iv_data[i][BASE_ADDR]);
+ 
+@@ -2248,7 +2253,7 @@ fapi::ReturnCode mss_eff_grouping(const fapi::Target & i_target,
+     std::vector<fapi::Target> &i_associated_centaurs)
+ {
+     fapi::ReturnCode rc;
+-    FAPI_INF("mss_eff_grouping: Start, chip %s", i_target.toEcmdString());
++    GRP_TRACE("mss_eff_grouping: Start, chip %s", i_target.toEcmdString());
+ 
+     do
+     {
+-- 
+2.14.1
+
diff --git a/openpower/patches/vesnin-patches/hostboot/hostboot-0005-Fill-empty-sensor-id-to-reserved-id-0xFF.patch b/openpower/patches/vesnin-patches/hostboot/hostboot-0005-Fill-empty-sensor-id-to-reserved-id-0xFF.patch
new file mode 100644
index 00000000..2cf8cdb9
--- /dev/null
+++ b/openpower/patches/vesnin-patches/hostboot/hostboot-0005-Fill-empty-sensor-id-to-reserved-id-0xFF.patch
@@ -0,0 +1,73 @@
+From a1f98d850d356001d37242ccf13f94114bd6378c Mon Sep 17 00:00:00 2001
+From: Artem Senichev <a.senichev@yadro.com>
+Date: Tue, 13 Mar 2018 15:44:05 +0300
+Subject: [PATCH] Fill empty sensor id to reserved id 0xFF
+
+Originally created by MSI (S188)
+
+Signed-off-by: Artem Senichev <a.senichev@yadro.com>
+---
+ src/usr/ipmi/ipmisensor.C              |  5 +----
+ src/usr/targeting/common/processMrw.pl | 21 ++++++++++++++++++---
+ 2 files changed, 19 insertions(+), 7 deletions(-)
+
+diff --git a/src/usr/ipmi/ipmisensor.C b/src/usr/ipmi/ipmisensor.C
+index 4aa1c9f4b..a5bded63a 100644
+--- a/src/usr/ipmi/ipmisensor.C
++++ b/src/usr/ipmi/ipmisensor.C
+@@ -216,14 +216,11 @@ namespace SENSOR
+         }
+         else
+         {
+-            TRACFCOMP(g_trac_ipmi,"We were not able to find a sensor number in"
++            TRACFCOMP(g_trac_ipmi,"Found a reserved sensor number (0xFF) in"
+                       " the IPMI_SENSORS attribute for sensor_name=0x%x"
+                       "for target with huid=0x%x, skipping call to "
+                       "sendSetSensorReading()",
+                     iv_name, TARGETING::get_huid( iv_target ));
+-
+-            assert(false);
+-
+         }
+ 
+         return l_err;
+diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl
+index 8bfa7bddd..45d250872 100644
+--- a/src/usr/targeting/common/processMrw.pl
++++ b/src/usr/targeting/common/processMrw.pl
+@@ -239,14 +239,29 @@ sub processIpmiSensors {
+                 $sensor_name=$name."_".$name_suffix;
+             }
+             my $attribute_name="";
+-            my $s=sprintf("0x%02X%02X,0x%02X",
+-                  oct($sensor_type),oct($entity_id),oct($sensor_id));
+-            push(@sensors,$s);
++
++            if ($sensor_id ne "")
++            {
++                my $s = sprintf("0x%02X%02X,0x%02X",
++                        oct($sensor_type), oct($entity_id), oct($sensor_id));
++                push(@sensors, $s);
++            }
++            else
++            {
++                my $s = sprintf("0x%02X%02X,0xFF",
++                                oct($sensor_type), oct($entity_id));
++                push(@sensors, $s);
++            }
++
+             my $sensor_id_str = "";
+             if ($sensor_id ne "")
+             {
+                 $sensor_id_str = sprintf("0x%02X",oct($sensor_id));
+             }
++            else
++            {
++                $sensor_id_str = sprintf("N/A");
++            }
+             my $str=sprintf(
+                 " %30s | %10s |  0x%02X  | 0x%02X |    0x%02x   |" .
+                 " %4s | %4d | %4d | %10s | %s\n",
+-- 
+2.14.1
+
diff --git a/openpower/patches/vesnin-patches/hostboot/hostboot-0006-Delay-for-Centaure-1.2V-ready-on-128-DIMM-system.patch b/openpower/patches/vesnin-patches/hostboot/hostboot-0006-Delay-for-Centaure-1.2V-ready-on-128-DIMM-system.patch
new file mode 100644
index 00000000..35ce1ea5
--- /dev/null
+++ b/openpower/patches/vesnin-patches/hostboot/hostboot-0006-Delay-for-Centaure-1.2V-ready-on-128-DIMM-system.patch
@@ -0,0 +1,41 @@
+From 45c23dab36e6dd76023670f4c0766b6104ff0011 Mon Sep 17 00:00:00 2001
+From: Artem Senichev <a.senichev@yadro.com>
+Date: Tue, 13 Mar 2018 15:47:30 +0300
+Subject: [PATCH] Delay for Centaure 1.2V ready on 128 DIMM system
+
+Resolves issue with full equipped DIMM lost.
+Originally created by MSI (S188).
+
+Signed-off-by: Artem Senichev <a.senichev@yadro.com>
+---
+ src/usr/hwpf/hwp/dram_training/dram_training.C | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/src/usr/hwpf/hwp/dram_training/dram_training.C b/src/usr/hwpf/hwp/dram_training/dram_training.C
+index bf20b7464..2d8a80e5f 100644
+--- a/src/usr/hwpf/hwp/dram_training/dram_training.C
++++ b/src/usr/hwpf/hwp/dram_training/dram_training.C
+@@ -329,6 +329,7 @@ void*    call_host_disable_vddr( void *io_pArgs )
+ {
+     errlHndl_t l_err = NULL;
+     IStepError l_StepError;
++    uint8_t i;
+ 
+     TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+               ENTER_MRK"call_host_disable_vddr");
+@@ -348,6 +349,12 @@ void*    call_host_disable_vddr( void *io_pArgs )
+ 
+     }
+ 
++    //Delay 2 seconds for Centaure 1.2V ready on 128 DIMM system.
++    for (i = 0; i < 1; ++i)
++    {
++        fapiDelay(1000 * 1000000, 10000); // 1,000,000 ns = 1ms, 1000*1ms
++    }
++
+     TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                EXIT_MRK"call_host_disable_vddr");
+ 
+-- 
+2.14.1
+
diff --git a/openpower/patches/vesnin-patches/hostboot/hostboot-0007-Set-IBM-instead-of-AMI-for-eSEL.patch b/openpower/patches/vesnin-patches/hostboot/hostboot-0007-Set-IBM-instead-of-AMI-for-eSEL.patch
new file mode 100644
index 00000000..a94ada2b
--- /dev/null
+++ b/openpower/patches/vesnin-patches/hostboot/hostboot-0007-Set-IBM-instead-of-AMI-for-eSEL.patch
@@ -0,0 +1,30 @@
+From 177df7658cbd8c78d5f3cf043e78d02880945b85 Mon Sep 17 00:00:00 2001
+From: Artem Senichev <a.senichev@yadro.com>
+Date: Tue, 13 Mar 2018 15:50:51 +0300
+Subject: [PATCH] Set IBM instead of AMI for eSEL
+
+Originally created by MSI (S188).
+The root cause is that the latest openbmc replace the NETFUN_AMI with
+NETFUN_IBM, so bmc can't log the eSEL from PNOR.
+
+Signed-off-by: Artem Senichev <a.senichev@yadro.com>
+---
+ src/include/usr/ipmi/ipmiif.H | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/include/usr/ipmi/ipmiif.H b/src/include/usr/ipmi/ipmiif.H
+index 44283cc0b..0f1309e31 100644
+--- a/src/include/usr/ipmi/ipmiif.H
++++ b/src/include/usr/ipmi/ipmiif.H
+@@ -258,7 +258,7 @@ namespace IPMI
+ 
+     //AMI-specific storage messages
+     inline const command_t partial_add_esel(void)
+-    { return std::make_pair(NETFUN_AMI, 0xf0); }
++    { return std::make_pair(NETFUN_IBM, 0xf0); }
+ 
+     // event messages
+     inline const command_t platform_event(void)
+-- 
+2.14.1
+
diff --git a/openpower/patches/vesnin-patches/occ/occ-0001-Add-DIMM-temperature-sensors.patch b/openpower/patches/vesnin-patches/occ/occ-0001-Add-DIMM-temperature-sensors.patch
new file mode 100644
index 00000000..b6336461
--- /dev/null
+++ b/openpower/patches/vesnin-patches/occ/occ-0001-Add-DIMM-temperature-sensors.patch
@@ -0,0 +1,97 @@
+From 7d9fc8ec22199e7fc7eca6079cb42f25554851f7 Mon Sep 17 00:00:00 2001
+From: Artem Senichev <a.senichev@yadro.com>
+Date: Tue, 13 Mar 2018 14:17:00 +0300
+Subject: [PATCH] Add DIMM temperature sensors
+
+Originally created by MSI (S188)
+
+Signed-off-by: Artem Senichev <a.senichev@yadro.com>
+---
+ src/occ/cmdh/cmdh_fsp_cmds.c | 54 ++++++++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 52 insertions(+), 2 deletions(-)
+
+diff --git a/src/occ/cmdh/cmdh_fsp_cmds.c b/src/occ/cmdh/cmdh_fsp_cmds.c
+index 74e45da..fb2f72d 100755
+--- a/src/occ/cmdh/cmdh_fsp_cmds.c
++++ b/src/occ/cmdh/cmdh_fsp_cmds.c
+@@ -355,10 +355,40 @@ ERRL_RC cmdh_poll_v10(cmdh_fsp_rsp_t * o_rsp_ptr)
+     l_sensorHeader.length = sizeof(cmdh_poll_temp_sensor_t);
+     l_sensorHeader.count  = 0;
+ 
++    uint16_t CpuIpmiId = 0;
++
++    //Check the current OCC
++    if (l_poll_rsp->occ_pres_mask == 0x02)
++    {
++        CpuIpmiId = 0x0D;  //CPU1
++    }
++    else if (l_poll_rsp->occ_pres_mask == 0x04)
++    {
++        CpuIpmiId = 0x02;  //CPU2
++    }
++    else if (l_poll_rsp->occ_pres_mask == 0x08)
++    {
++        CpuIpmiId = 0x0A;  //CPU3
++    }
++    else
++    {
++        CpuIpmiId = 0x0B;  //CPU0
++    }
++
+     //Initialize to max number of possible temperature sensors.
+-    cmdh_poll_temp_sensor_t l_tempSensorList[MAX_NUM_CORES + MAX_NUM_MEM_CONTROLLERS + (MAX_NUM_MEM_CONTROLLERS * NUM_DIMMS_PER_CENTAUR)];
++    cmdh_poll_temp_sensor_t l_tempSensorList[MAX_NUM_CORES + MAX_NUM_MEM_CONTROLLERS + (MAX_NUM_MEM_CONTROLLERS * NUM_DIMMS_PER_CENTAUR) + 2]; //Add two items for peak/average core temperature.
+     memset(l_tempSensorList, 0x00, sizeof(l_tempSensorList));
+ 
++    //The average value of core temperature. Currently not used.
++    l_tempSensorList[l_sensorHeader.count].id = G_amec_sensor_list[TEMP2MSP0]->ipmi_sid;
++    l_tempSensorList[l_sensorHeader.count].value = G_amec_sensor_list[TEMP2MSP0]->sample;
++    l_sensorHeader.count++;
++
++    //The peak value of core temperature
++    l_tempSensorList[l_sensorHeader.count].id = CpuIpmiId;
++    l_tempSensorList[l_sensorHeader.count].value = G_amec_sensor_list[TEMP2MSP0PEAK]->sample;
++    l_sensorHeader.count++;
++
+     for (k=0; k<MAX_NUM_CORES; k++)
+     {
+         if(CORE_PRESENT(k))
+@@ -370,6 +400,26 @@ ERRL_RC cmdh_poll_v10(cmdh_fsp_rsp_t * o_rsp_ptr)
+     }
+ 
+     uint8_t l_cent, l_dimm = 0;
++    uint16_t CpuId = 0;
++
++    //Check the current OCC
++    if(l_poll_rsp->occ_pres_mask == 0x02)
++    {
++        CpuId = 0x0200;  //CPU1
++    }
++    else if (l_poll_rsp->occ_pres_mask == 0x04)
++    {
++        CpuId = 0x0300;  //CPU2
++    }
++    else if (l_poll_rsp->occ_pres_mask == 0x08)
++    {
++        CpuId = 0x0400;  //CPU3
++    }
++    else
++    {
++        CpuId = 0x0100;  //CPU0
++    }
++
+     for (l_cent=0; l_cent < MAX_NUM_MEM_CONTROLLERS; l_cent++)
+     {
+         if (CENTAUR_PRESENT(l_cent))
+@@ -391,7 +441,7 @@ ERRL_RC cmdh_poll_v10(cmdh_fsp_rsp_t * o_rsp_ptr)
+             {
+                 if (g_amec->proc[0].memctl[l_cent].centaur.dimm_temps[l_dimm].temp_sid != 0)
+                 {
+-                    l_tempSensorList[l_sensorHeader.count].id = g_amec->proc[0].memctl[l_cent].centaur.dimm_temps[l_dimm].temp_sid;
++                    l_tempSensorList[l_sensorHeader.count].id = CpuId + (l_cent * 8) + l_dimm;  //Add extra temperature IDs for all DIMMs.
+                     //If a dimm timed out long enough, we should return 0xFFFF for that sensor.
+                     if (G_dimm_temp_expired_bitmap.bytes[l_cent] & (DIMM_SENSOR0 >> l_dimm))
+                     {
+-- 
+2.14.1
+