1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
|
menu "SPI Support"
config DM_SPI
bool "Enable Driver Model for SPI drivers"
depends on DM
help
Enable driver model for SPI. The SPI slave interface
(spi_setup_slave(), spi_xfer(), etc.) is then implemented by
the SPI uclass. Drivers provide methods to access the SPI
buses that they control. The uclass interface is defined in
include/spi.h. The existing spi_slave structure is attached
as 'parent data' to every slave on each bus. Slaves
typically use driver-private data instead of extending the
spi_slave structure.
if DM_SPI
config CADENCE_QSPI
bool "Cadence QSPI driver"
help
Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
used to access the SPI NOR flash on platforms embedding this
Cadence IP core.
config DESIGNWARE_SPI
bool "Designware SPI driver"
help
Enable the Designware SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this Designware
IP core.
config FSL_DSPI
bool "Freescale DSPI driver"
help
Enable the Freescale DSPI driver. This driver can be used to
access the SPI NOR flash and SPI Data flash on platforms embedding
this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
use this driver.
config SANDBOX_SPI
bool "Sandbox SPI driver"
depends on SANDBOX && DM
help
Enable SPI support for sandbox. This is an emulation of a real SPI
bus. Devices can be attached to the bus using the device tree
which specifies the driver to use. As an example, see this device
tree fragment from sandbox.dts. It shows that the SPI bus has a
single flash device on chip select 0 which is emulated by the driver
for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
spi@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
compatible = "sandbox,spi";
cs-gpios = <0>, <&gpio_a 0>;
flash@0 {
reg = <0>;
compatible = "spansion,m25p16", "sandbox,spi-flash";
spi-max-frequency = <40000000>;
sandbox,filename = "spi.bin";
};
};
config XILINX_SPI
bool "Xilinx SPI driver"
help
Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
controller support 8 bit SPI transfers only, with or w/o FIFO.
For more info on Xilinx SPI Register Definitions and Overview
see driver file - drivers/spi/xilinx_spi.c
config ZYNQ_SPI
bool "Zynq SPI driver"
depends on ARCH_ZYNQ || TARGET_XILINX_ZYNQMP
help
Enable the Zynq SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this Zynq
SPI IP core.
endif # if DM_SPI
config TI_QSPI
bool "TI QSPI driver"
help
Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
This driver support spi flash single, quad and memory reads.
endmenu # menu "SPI Support"
|
