blob: 783352d476348ae00245a1f50d88b95fd05b71fc (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
|
/*
* Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <ide.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pci.h>
#include <netdev.h>
#include "r7780mp.h"
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
#if defined(CONFIG_R7780MP)
puts("BOARD: Renesas Solutions R7780MP\n");
#else
puts("BOARD: Renesas Solutions R7780RP\n");
#endif
return 0;
}
int board_init(void)
{
/* SCIF Enable */
writew(0x0, PHCR);
return 0;
}
int dram_init(void)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
return 0;
}
void led_set_state(unsigned short value)
{
}
void ide_set_reset(int idereset)
{
/* if reset = 1 IDE reset will be asserted */
if (idereset) {
writew(0x432, FPGA_CFCTL);
#if defined(CONFIG_R7780MP)
writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW);
#else
writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW);
#endif
writew(0x01, FPGA_CFCDINTCLR);
}
}
static struct pci_controller hose;
void pci_init_board(void)
{
pci_sh7780_init(&hose);
}
int board_eth_init(bd_t *bis)
{
/* return >= 0 if a chip is found, the board's AX88796L is n2k-based */
return ne2k_register() + pci_eth_init(bis);
}
|
