blob: 3583d01c7615e2368c96510669cb281284dc8472 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
|
/*
* Authors: Xiangfu Liu <xiangfu@sharism.cc>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 3 of the License, or (at your option) any later version.
*/
#include <common.h>
#include <asm/io.h>
#include <asm/jz4740.h>
DECLARE_GLOBAL_DATA_PTR;
static void gpio_init(void)
{
unsigned int i;
/* Initialize NAND Flash Pins */
__gpio_as_nand();
/* Initialize SDRAM pins */
__gpio_as_sdram_16bit_4720();
/* Initialize LCD pins */
__gpio_as_lcd_18bit();
/* Initialize MSC pins */
__gpio_as_msc();
/* Initialize Other pins */
for (i = 0; i < 7; i++) {
__gpio_as_input(GPIO_KEYIN_BASE + i);
__gpio_enable_pull(GPIO_KEYIN_BASE + i);
}
for (i = 0; i < 8; i++) {
__gpio_as_output(GPIO_KEYOUT_BASE + i);
__gpio_clear_pin(GPIO_KEYOUT_BASE + i);
}
__gpio_as_input(GPIO_KEYIN_8);
__gpio_enable_pull(GPIO_KEYIN_8);
/* enable the TP4, TP5 as UART0 */
__gpio_jtag_to_uart0();
__gpio_as_output(GPIO_AUDIO_POP);
__gpio_set_pin(GPIO_AUDIO_POP);
__gpio_as_output(GPIO_LCD_CS);
__gpio_clear_pin(GPIO_LCD_CS);
__gpio_as_output(GPIO_AMP_EN);
__gpio_clear_pin(GPIO_AMP_EN);
__gpio_as_output(GPIO_SDPW_EN);
__gpio_disable_pull(GPIO_SDPW_EN);
__gpio_clear_pin(GPIO_SDPW_EN);
__gpio_as_input(GPIO_SD_DETECT);
__gpio_disable_pull(GPIO_SD_DETECT);
__gpio_as_input(GPIO_USB_DETECT);
__gpio_enable_pull(GPIO_USB_DETECT);
}
static void cpm_init(void)
{
struct jz4740_cpm *cpm = (struct jz4740_cpm *)JZ4740_CPM_BASE;
uint32_t reg = readw(&cpm->clkgr);
reg |= CPM_CLKGR_IPU |
CPM_CLKGR_CIM |
CPM_CLKGR_I2C |
CPM_CLKGR_SSI |
CPM_CLKGR_UART1 |
CPM_CLKGR_SADC |
CPM_CLKGR_UHC |
CPM_CLKGR_UDC |
CPM_CLKGR_AIC1;
writew(reg, &cpm->clkgr);
}
int board_early_init_f(void)
{
gpio_init();
cpm_init();
calc_clocks(); /* calc the clocks */
rtc_init(); /* init rtc on any reset */
return 0;
}
/* U-Boot common routines */
int checkboard(void)
{
printf("Board: Qi LB60 (Ingenic XBurst Jz4740 SoC, Speed %ld MHz)\n",
gd->cpu_clk / 1000000);
return 0;
}
|
