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path: root/include/configs/MPC8313ERDB.h
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* PPC: Create and use CONFIG_HIGH_BATSBecky Bruce2008-06-031-0/+2
| | | | | | | | | | | Change all code that conditionally operates on high bat registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS instead of the myriad ways this is done now. Define the option for every config for which high bats are supported (and enabled by early boot, on parts where they're not always enabled) Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* Big white-space cleanup.Wolfgang Denk2008-05-211-12/+12
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Fix 8313ERDB board configurationYork Sun2008-05-191-8/+6
| | | | | | | | | Change LCRR clock ratio from 2 to 4 to commodate VSC7385. Correct TSEC1 vs TSEC2 assignment. Define ETHADDR and ETH1ADDR always. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com>
* mpc83xx: bump loadaddr over fdtaddr to 0x500000Kim Phillips2008-04-251-1/+1
| | | | | | | | this seems as a good compromise between human memory, typing, and last but not least, to accommodate for current and future kernel bloat. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Dave Liu <daveliu@freescale.com>
* 83xx: Add Vitesse VSC7385 firmware uploadingTimur Tabi2008-03-251-29/+59
| | | | | | | | | | Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET. Cleaned up the board header files to make selecting the VSC7385 easier to control. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Changes in uboot DDR configuration for MPC8313eRDBPoonam Aggrwal2008-01-161-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These changes were identified by HighSmith Bill ,Mazzyar and Joseph for DDR configuration in u-boot code. Some are related to performance, some affect stability and some correct few basic errors in the current configuration. The changes have been tested and found to give better memory latency figures on MPC8313eRDB.LMBench figures prove it. The changes are: - CS0_CONFIG[ AP_n_EN] is changed from 1 to 0 (this may improve performance for application with many read or write to open pages). - CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to 001 (activating all the CS when only one is used may cause unwanted noise on the system) - TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on Tras=45ns) - TIMING_CFG_1[REFREC] changed from 21 clks to 18clks. - TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to comply with the 3 ODT clk requirements) - TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4. - TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks. - DDR_SDRAM_MODE[AL]changed from 0 to 1. - DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks. - DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510. - DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500. The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git The last commit on this tree was 6775c68683a53c7abc778774641aac6f833a2cbf Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com> Cc: Bill HighSmith <Bill.Highsmith@freescale.com> Cc: Razzaz Mazyar <MRazzaz@freescale.com> Cc: Josep P J <PJ.Joseph@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Remove cache config from config.hDave Liu2008-01-101-5/+0
| | | | | | | clean up the cache config from configs.h of board Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* fix comments with new drivers organizationMarcel Ziswiler2008-01-091-1/+1
| | | | Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* mpc83xx: convert to using do_fixup_*()Kim Phillips2008-01-081-5/+1
| | | | | | | | | convert to using simpler mpc85xx style fdt update code; streamline by eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm the old school FLAT_TREE code from 83xx (since the sbc8349 was just converted over to using libfdt). Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: fix CFG_ENV_ADDR and CFG_ENV_SECT_SIZE definitionsTimur Tabi2008-01-081-1/+2
| | | | | | | | | Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the currently-defined 83xx boards. This change guarantees that the environment will be located on the first flash sector after the U-Boot image. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* fdt: remove unused OF_FLAT_TREE_MAX_SIZE referencesKim Phillips2007-08-291-3/+0
| | | | | | and make some minor corrections to the FDT part of the README. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xxWolfgang Denk2007-08-181-0/+1
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| * Add CONFIG_HAS_ETH0 to all boards with TSECAndy Fleming2007-08-161-0/+1
| | | | | | | | | | | | | | | | | | The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether to update TSEC1's device-tree node, so we need to add it to all the boards with TSECs. Do this for 83xx and 86xx, too, since they will eventually do something similar. Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk2007-08-181-3/+3
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| * mpc83xx: implement board_add_ram_infoKim Phillips2007-08-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add board_add_ram_info, to make memory diagnostic output more consistent. u-boot banner output now looks like: DRAM: 256 MB (DDR1, 64-bit, ECC on) and for boards with SDRAM on the local bus, a line such as this is added: SDRAM: 64 MB (local bus) also replaced some magic numbers with their equivalent define names. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: enable libfdt by default on freescale boardsKim Phillips2007-08-151-1/+1
| | | | | | | | | | | | | | | | this enables libfdt code by default for the freescale mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx and gp boards. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Define tsec flag values in config filesAndy Fleming2007-08-161-0/+2
|/ | | | | | | | | | The tsec_info structure and array has a "flags" field for each ethernet controller. This field is the only reason there are settings. Switch to defining TSECn_FLAGS for each controller in the config header, and we can greatly simplify the array, and also simplify the addition of future boards. Signed-off-by: Andy Fleming <afleming@freescale.com>
* Fix build errors and warnings / code cleanup.Wolfgang Denk2007-08-021-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* include/configs/[p-z]* + misc: Cleanup BOOTP and lingering CFG_CMD_*.Jon Loeliger2007-07-101-0/+9
| | | | | | | | | Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h used to be included but CONFIG_BOOTP_MASK was not defined. Remove lingering references to CFG_CMD_* symbols. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* include/configs: Use new CONFIG_CMD_* in 83xx board config files.Jon Loeliger2007-07-051-15/+14
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-171-4/+4
| | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Minor Coding Style cleanup, update CHANGELOG.Wolfgang Denk2007-05-161-24/+16
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc83xx: minor fixups for 8313rdb introductionKim Phillips2007-04-251-2/+2
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* mpc83xx: Add MPC8313ERDB support.Scott Wood2007-04-231-0/+569
Signed-off-by: Scott Wood <scottwood@freescale.com>
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