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* The patch introduces the CRITICAL feature of POST tests. If the test marked ↵Yuri Tikhonov2008-03-181-0/+1
| | | | | | | as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit ↵Shinya Kuribayashi2008-03-021-3/+3
| | | | | | | | | targets. The previous patch was lacking of i386, microblaze, nios and nios2. This patch tries to fix them. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* Introduce map_physmem() and unmap_physmem()Haavard Skinnemoen2007-12-131-0/+26
| | | | | | | | | | | | | | | | map_physmem() returns a virtual address which can be used to access a given physical address without involving the cache. unmap_physmem() should be called when the virtual address returned by map_physmem() is no longer needed. This patch adds a stub implementation which simply returns the physical address cast to a uchar * for all architectures except AVR32, which converts the physical address to an uncached virtual mapping. unmap_physmem() is a no-op on all architectures, but if any architecture needs to do such mappings through the TLB, this is the hook where those TLB entries can be invalidated. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [FIX] fix microblaze file permitissionMichal Simek2007-06-171-0/+0
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* add: reading special purpose registersMichal Simek2007-05-081-11/+6
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* add: Microblaze V5 exception handlingMichal Simek2007-05-081-0/+8
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* add: FSL control read and writeMichal Simek2007-05-081-0/+15
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* Merge git://www.denx.de/git/u-bootMichal Simek2007-05-081-1/+0
|\ | | | | | | | | | | | | Conflicts: include/asm-microblaze/microblaze_intc.h include/linux/stat.h
| * Minor coding style cleanup.Wolfgang Denk2007-04-042-2/+0
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* | new: USE_MSR_INTR supportMichal Simek2007-05-071-0/+37
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* | fix: interrupt handler for multiple sourcesMichal Simek2007-05-071-0/+2
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* | new: add writing to msr registerMichal Simek2007-05-071-3/+9
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* | new: FSL and MSR supportMichal Simek2007-05-051-0/+37
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* [CLEAN] Remove inefficient Suzaku codeMichal Simek2007-03-302-56/+0
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* [Microblaze][PATCH]Michal Simek2007-03-112-0/+83
| | | | | | | | | | | | | timer support interrupt controller support flash support ethernet support cache support board information support env support booting image support adding support for Xilinx ML401
* [PATCH v3] Add sync to ensure flash_write_cmd is fully finishedHaiying Wang2007-02-211-0/+4
| | | | | | | | | Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Remove unnnecessary #include <linux/types.h> from include/asm-*/u-boot.hWolfgang Denk2005-11-251-0/+7
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* Patches by Yasushi Shoji, 29 Jun 2004:wdenk2004-07-102-1/+4
| | | | | | | | | | | - add empty include/asm-microblaze/processor.h - add to CREDITS and MAINTAINERS - add gd initialization - add MicroBlaze and SUZAKU board to MAKEALL script - add reset support for SUZAKU - add flush_cache() for MicroBlaze - add CFG_FLASH_SIZE to include/configs/suzaku.h since we have fixed size flash memory on SUZAKU
* * Add missing microblaze header fileswdenk2004-04-182-0/+557
| | | | | | * Patch by Rune Torgersen, 06 Apr 2004: - Fix some PCI problems on the MPC8266ADS board - Fix the location of some PCI entries in the immap structure
* * Patch by Yasushi Shoji, 07 Apr 2004:wdenk2004-04-1814-0/+1256
- add support for microblaze processors - add support for AtmarkTechno "suzaku" board
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