summaryrefslogtreecommitdiffstats
path: root/include/asm-microblaze
diff options
context:
space:
mode:
authorMichal Simek <monstr@monstr.eu>2007-05-07 23:58:31 +0200
committerMichal Simek <monstr@monstr.eu>2007-05-07 23:58:31 +0200
commitfb05f6da35ea1c15c553abe6f23f656bf18dc5db (patch)
tree97d017c2c93576570338cd2a5d2034981f131bc8 /include/asm-microblaze
parenta7bac7e9b57ba948051beb19ec5be3a75ce75383 (diff)
downloadblackbird-obmc-uboot-fb05f6da35ea1c15c553abe6f23f656bf18dc5db.tar.gz
blackbird-obmc-uboot-fb05f6da35ea1c15c553abe6f23f656bf18dc5db.zip
new: USE_MSR_INTR support
Diffstat (limited to 'include/asm-microblaze')
-rwxr-xr-x[-rw-r--r--]include/asm-microblaze/asm.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h
index fcda31f4a8..c59854a860 100644..100755
--- a/include/asm-microblaze/asm.h
+++ b/include/asm-microblaze/asm.h
@@ -39,5 +39,42 @@
#define MTS(val) \
__asm__ __volatile__ ("mts rmsr, %0"::"r" (val));
+/* get return address from interrupt */
#define R14(val) \
__asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
+
+/* use machine status registe USE_MSR_REG */
+#ifdef XILINX_USE_MSR_INSTR
+#define MSRSET(val) \
+ __asm__ __volatile__ ("msrset r0," #val );
+
+#define MSRCLR(val) \
+ __asm__ __volatile__ ("msrclr r0," #val );
+
+#else
+#define MSRSET(val) \
+{ \
+ register unsigned tmp; \
+ __asm__ __volatile__ (" \
+ mfs %0, rmsr; \
+ ori %0, %0, "#val"; \
+ mts rmsr, %0; \
+ nop;" \
+ : "=r" (tmp) \
+ : "d" (val) \
+ : "memory"); \
+}
+
+#define MSRCLR(val) \
+{ \
+ register unsigned tmp; \
+ __asm__ __volatile__ (" \
+ mfs %0, rmsr; \
+ andi %0, %0, ~"#val"; \
+ mts rmsr, %0; \
+ nop;" \
+ : "=r" (tmp) \
+ : "d" (val) \
+ : "memory"); \
+}
+#endif
OpenPOWER on IntegriCloud