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* Move architecture-specific includes to arch/$ARCH/include/asmPeter Tyser2010-04-131-45/+0
| | | | | | | | This helps to clean up the include/ directory so that it only contains non-architecture-specific headers and also matches Linux's directory layout which many U-Boot developers are already familiar with. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* TI: DaVinci DM646x: Update flag used to represent DM646x SOC'sSandeep Paulraj2009-10-131-1/+1
| | | | | | | | | | | In the DaVinci specific code, we use both CONFIG_SOC_DM646X and CONFIG_SOC_DM646x to represent DM646x specific code. This patch changes occurrences of CONFIG_SOC_DM646x to CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use the flag CONFIG_SOC_DM644X. We want some uniformity. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Tom Rix <Tom.Rix@windriver.com>
* davinci_nand chipselect/init cleanupDavid Brownell2009-07-071-0/+2
| | | | | | | | | | | | | | | | | Update chipselect handling in davinci_nand.c so that it can handle 2 GByte chips the same way Linux does: as one device, even though it has two halves with independent chip selects. For such chips the "nand info" command reports: Device 0: 2x nand0, sector size 128 KiB Switch to use the default chipselect function unless the board really needs its own. The logic for the Sonata board moves out of the driver into board-specific code. (Which doesn't affect current build breakage if its NAND support is enabled...) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND DaVinci: Update to ALE/CLE Mask valuesSandeep Paulraj2009-07-071-0/+5
| | | | | | | | | | | All DaVinci SOC's use a CLE mask of 0x10 and an ALE mask of 0x8 except the DM646x. This was decided by the design team driving the design. This patch updates the CLE and ALE values for DM646x. Updated patches for DM646x will be sent shortly. This applies to u-boot-nand-flash git Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* ARM DaVinci: Changing ALE Mask ValueSandeep Paulraj2009-07-071-1/+1
| | | | | | | | The ALE mask used by DaVinci SOCs is wrong. The patch changes the mask value from '0xa' to '0x8'. This is the mask we use for all TI releases. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)David Brownell2009-07-071-69/+0
| | | | | | | | | | | | | | | | | | | | | | Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty; it's also unused by any current boards, and doesn't even match the main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC on newer chips that support it). DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30, match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths do seem to partially match what MontaVista/TI kernels (4.0/2.6.10, and 5.0/2.6.18) do ... but only for small pages. Large page support is really broken (and it's unclear just what software it was trying to match!), and the ECC layout was making three more bytes available for use by filesystem (or whatever) code. Since this option itself seems broken, remove it. Add a comment about the MV/TI compat issue, and the most straightforward way to address it (should someone really need to solve it). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* davinci_nand: cleanup I (minor)David Brownell2009-07-071-54/+0
| | | | | | | | | | | | | | | | | | | | | | | | Minor cleanup for DaVinci NAND code: - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't be defined when there are multiple chipselect lines in use (as with common 2 GByte chips). - Cleanup handling of EMIF control registers * Only need one pointer pointing to them * Remove incorrect and unused struct supersetting them - Use the standard waitfunc; we don't need a custom version - Partial legacy cleanup: * Don't initialize every board like it's a DM6446 EVM * #ifdef a bit more code for BROKEN_ECC Sanity checked with small page NAND on dm355 and dm6446 EVMs; and large page on dm355 EVM (packaged as two devices, not one). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-4/+4
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* [ARM] TI DaVinci support, hopefully finalSergey Kubushyn2007-08-101-0/+161
Add support for the following DaVinci boards: - DV_EVM - SCHMOOGIE - SONATA Changes: - Split into separate board directories - Removed changes to MTD_DEBUG (or whatever it's called) - New CONFIG_CMD party line followed - Some cosmetic fixes, cleanup etc. - Patches against the latest U-Boot tree as of now. - Fixed CONFIG_CMD_NET in net files. - Fixed CONFIG_CMD_EEPROM for schmoogie. - Made sure it compiles and works (forceenv() link problem) on SCHMOOGIE and DV_EVM. Can't check if it works on SONATA, don't have a board any more, but it at least compiles. Here is an excerpt from session log on SCHMOOGIE... U-Boot 1.2.0-g6c33c785-dirty (Aug 7 2007 - 13:07:17) DRAM: 128 MB NAND: 128 MiB In: serial Out: serial Err: serial ARM Clock : 297MHz DDR Clock : 162MHz ETH PHY : DP83848 @ 0x01 U-Boot > iprobe Valid chip addresses: 1B 38 3A 3D 3F 50 5D 6F U-Boot > ping 192.168.253.10 host 192.168.253.10 is alive U-Boot > Signed-off-by: Sergey Kubushyn <ksi@koi8.net> Acked-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Zach Sadecki <Zach.Sadecki@ripcode.com> Acked-by: Stefan Roese <sr@denx.de>
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