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* sunxi: ohci: Add A83T compatibleChen-Yu Tsai2016-03-311-0/+1
| | | | | | | | We have a separate compatible for almost each SoC. Add one for the A83T. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: ehci: Add A83T compatibleChen-Yu Tsai2016-03-311-0/+1
| | | | | | | | We have a separate compatible for almost each SoC. Add one for the A83T. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* power: axp818: Add support for FLDOsChen-Yu Tsai2016-03-312-0/+61
| | | | | | | | | The FLDOs on AXP818 PMIC normally provide power to CPUS and USB HSIC PHY on the A83T/H8. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* power: axp818: Fix DCDC5 default voltageChen-Yu Tsai2016-03-311-2/+1
| | | | | | | | | | | DCDC5 is designed to supply VCC-DRAM, which is normally 1.5V for DDR3, 1.35V for DDR3L, and 1.2V for LPDDR3. Also remove CONFIG_AXP_DCDC5_VOLT from h8_homlet_v2_defconfig. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: axp: Generalize register macros for VBUS drive GPIOChen-Yu Tsai2016-03-311-11/+14
| | | | | | | | | VBUS drive is supported on AXP221 and later PMICs. Rework the macros so we can support this on later PMICs without too much work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* musb: sunxi: Add support for A83TChen-Yu Tsai2016-03-311-1/+1
| | | | | | | | | | Like the Allwinner A33 SoC, the A83T is missing the config register from the musb USB DRD hardware block. Use a known working value for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* net: phy: Optionally force master mode for RTL PHYMichael Haas2016-03-312-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces CONFIG_RTL8211X_PHY_FORCE_MASTER. If this define is set, RTL8211x PHYs (except for the RTL8211F) will have their 1000BASE-T master/slave autonegotiation disabled and forced to master mode. This is helpful for PHYs like the RTL8211C which produce unstable links in slave mode. Such problems have been found on the A20-Olimex-SOM-EVB and A20-OLinuXino-Lime2. There is no proper way to identify affected PHYs in software as the RTL8211C shares its UID with the RTL8211B. Thus, this fix requires the introduction of an #ifdef. CC: fradav@gmail.com CC: merker@debian.org CC: hdegoede@redhat.com CC: ijc@hellion.org.uk CC: joe.hershberger@ni.com Signed-off-by: Michael Haas <haas@computerlinguist.org> Tested-by: Karsten Merker <merker@debian.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-03-295-6/+21
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| * crypto/fsl: Make CAAM transactions cacheableSaksham Jain2016-03-292-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit solves CAAM coherency issue on ls2080. When caches are enabled and CAAM's DMA's AXI transcations are not made cacheable, Core reads/writes data from/to caches and CAAM does from main memory. This forces data flushes to synchronize various data structures. But even if any data in proximity of these structures is read by core, these structures again are fetched in caches. To avoid this problem, either all the data that CAAM accesses can be made cache line aligned or CAAM transcations can be made cacheable. So, this commit makes CAAM transcations as write back with write and read allocate. Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * crypto/fsl: Correct 64-bit write when MMU disabledSaksham Jain2016-03-291-4/+3
| | | | | | | | | | | | | | | | | | | | | | When MMU is disabled, 64-bit write must be aligned at 64-bit boundary. Becaue the memory location is not guaranteed to be 64-bit aligned, the 64-bit write needs to be split into two 32-bit writes to avoid the alignment exception. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: fsl-mc: Check NULL before pointer dereferencePrabhakar Kushwaha2016-03-291-1/+1
| | | | | | | | | | | | | | | | | | | | NULL pointer should be checked before any dereference. This patch move memest after the NULL pointer check. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Jose Rivera <german.rivera@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: fsl-mc: Free dflt_dpio pointer after its usagePrabhakar Kushwaha2016-03-281-1/+1
| | | | | | | | | | | | | | | | Free dflt_dpio pointer after its usage during error handling Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Jose Rivera <german.rivera@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | omap24xx_i2c: Implement CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOWGuy Thouret2016-03-281-0/+34
| | | | | | | | | | Signed-off-by: Guy Thouret <guy.thouret@wems.co.uk> Cc: Heiko Schocher <hs@denx.de>
* | dm: i2c: mxc_i2c: implement i2c_idle_busPeng Fan2016-03-281-9/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement i2c_idle_bus in driver, then setup_i2c can be dropped for boards which enable DM_I2C/DM_GPIO/PINCTRL. The i2c_idle_bus force bus idle flow follows setup_i2c in arch/arm/imx-common/i2c-mxv7.c This patch is an implementation following linux kernel patch: " commit 1c4b6c3bcf30d0804db0d0647d8ebeb862c6f7e5 Author: Gao Pan <b54642@freescale.com> Date: Fri Oct 23 20:28:54 2015 +0800 i2c: imx: implement bus recovery Implement bus recovery methods for i2c-imx so we can recover from situations where SCL/SDA are stuck low. Once i2c bus SCL/SDA are stuck low during transfer, config the i2c pinctrl to gpio mode by calling pinctrl sleep set function, and then use GPIO to emulate the i2c protocol to send nine dummy clock to recover i2c device. After recovery, set i2c pinctrl to default group setting. " See Documentation/devicetree/bindings/i2c/i2c-imx.txt for detailed description. 1. Introuduce scl_gpio/sda_gpio/bus in mxc_i2c_bus. 2. Discard the __weak attribute for i2c_idle_bus and implement it, since we have pinctrl driver/driver model gpio driver. We can use device tree, but not let board code to do this. 3. gpio state for mxc_i2c is not a must, but it is recommended. If there is no gpio state, driver will give tips, but not fail. 4. The i2c controller was first probed, default pinctrl state will be used, so when need to use gpio function, need to do "pinctrl_select_state(dev, "gpio")" and after force bus idle, need to switch back "pinctrl_select_state(dev, "default")". This is example about how to use the gpio force bus idle function: " &i2c1 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; pinctrl-1 = <&pinctrl_i2c1_gpio>; scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; status = "okay"; [....] }; [.....] pinctrl_i2c1_gpio: i2c1grp_gpio { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 >; }; " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com>
* | Revert "pxa_lcd: make driver cache-aware"Tom Rini2016-03-271-16/+0
| | | | | | | | | | | | This reverts commit 59deb7fe8d23c8ec2b659d99323ec4a2ec19148a. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Revert "pxa_lcd: invert colors for Zipit Z2 to get white on black palette"Tom Rini2016-03-271-1/+1
| | | | | | | | | | | | This reverts commit 3bc8ffd9cb774feceefc7bdebe9353fcea071343. Signed-off-by: Tom Rini <trini@konsulko.com>
* | cfi_flash: return device into read array mode after reading statusVasily Khoruzhick2016-03-271-0/+2
| | | | | | | | | | | | | | | | Otherwise flash remains in read status mode and it's not possible to access data on flash. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* | pxa_lcd: make driver cache-awareVasily Khoruzhick2016-03-271-0/+16
| | | | | | | | Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
* | pxa_lcd: invert colors for Zipit Z2 to get white on black paletteVasily Khoruzhick2016-03-271-1/+1
| | | | | | | | Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
* | zipitz2: enable LCD rotationVasily Khoruzhick2016-03-271-0/+1
| | | | | | | | | | | | | | z2's screen is rotated by 270 degrees Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* | serial: add BCM283x mini UART driverStephen Warren2016-03-272-0/+141
| | | | | | | | | | | | | | | | The RPi3 typically uses the regular UART for high-speed communication with the Bluetooth device, leaving us the mini UART to use for the serial console. Add support for this UART so we can use it. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | net: rtl8169: Fix build error when DEBUG is onBin Meng2016-03-271-5/+5
| | | | | | | | | | | | | | | | | | When DEBUG_RTL8169 is on, a build error occurs in function 'rtl_init': error: 'dev' undeclared. Fix this. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | mmc: Print send_cmd response only when return value is zeroBin Meng2016-03-271-38/+42
| | | | | | | | | | | | | | | | send_cmd response is valid only when no error happened. If an error occured, let mmc_send_cmd() print the return value to aid debugging. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | mmc: Fix switch..case indentionBin Meng2016-03-271-70/+70
| | | | | | | | | | | | | | Correct the indention level of switch..case statements. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Fix typo choosen in comments and printf logsAlexander Merkle2016-03-271-2/+2
| | | | | | | | | | | | | | | | Minor change: chosen is written with one "o". No code change here, only comment & printf. Signed-off-by: Alexander Merkle <alexander.merkle@lauterbach.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | mmc: bcm2835: fix 64-bit build warningStephen Warren2016-03-271-1/+1
| | | | | | | | | | | | | | | | Fixes: drivers/mmc/bcm2835_sdhci.c: In function ‘bcm2835_sdhci_init’: drivers/mmc/bcm2835_sdhci.c:181:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | bcm2835 video: Map fb as cachedAlexander Graf2016-03-271-0/+9
| | | | | | | | | | | | | | | | | | The bcm2835 frame buffer is in RAM, so we can easily map it as cached and gain all the glorious performance boost that brings with it. Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* | stm32: stm32f4: move flash driver to mtd driver locationVikas Manocha2016-03-263-0/+175
| | | | | | | | | | | | | | Same flash driver can be used by other stm32 families like stm32f7. Better place for this driver would be mtd driver location. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* | usb: gadget: Move CONFIG_USB_GADGET to KconfigSam Protsenko2016-03-252-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The description was borrowed from kernel. "tristate" type was changed to "bool" (I believe we don't support modules for u-boot yet, right?). CONFIG_USB_GADGET requires CONFIG_USB to be defined too, so add it along as well. Definitions were added to defconfig files in a way that "make savedefconfig" generates exactly the same file as used defconfig. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> [trini: Add zynq_zc702 conversion] Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-03-257-2/+234
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| * | fpga: altera: Add StratixV supportStefan Roese2016-03-243-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for programming of the StratixV FPGAs. Programming is done in this case (board theadorable) via SPI. The board may provide board specific code for bitstream programming. This StratixV support will be used by the theadorable board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | gpio: Add DM GPIO driver for Marvell MVEBUStefan Roese2016-03-243-0/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a DM GPIO driver for the Marvell MVEBU SoCs. There are other non-DM drivers that might be used on these platforms. But this patch creates a new DM driver. Which will be used by all Armada XP/38x boards. Other MVEBU SoC (Kirkwood / Orion) may follow once they support DM as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Fix ddr3_init() cpu configDirk Eibach2016-03-241-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Armada 38x has a maximum of two cores. Probably copy/paste bug from Armada XP. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-03-234-6/+41
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| * | sunxi: Fix 2nd usb controller on sun4i/sun7i no longer workingHans de Goede2016-03-232-5/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 2nd usb controller on sun4i/sun7i has its base address 0x8000 bytes from the 1st one, rather then 0x1000. Also the ahb clk gates are interleaved with the ohci clk-gates introducing a hole between the clks for usb1 and usb2. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add a bunch of missing compatible strings to sunxi_gpio.cHans de Goede2016-03-231-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel has different compatible strings for the pio block because the pin-muxing is different on all the different SoCs, but sunxi_gpio.c only support the basic gpio functionality, which is identical everywhere. Add the missing compatible strings for various SoC models. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Configure only LVDS pins instead of all LCD pins when LVDS interface ↵Lawrence Yu2016-03-231-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | selected The behavior before this patch would attempt to configure the mux setting for pins 0 to 27 on PORTD to all be setting 3 for LVDS. The LVDS interface actually only uses pins 18 to 27 and not pins 0 to 27 as in the parallel LCD interface. This patch restricts the configuration to only the relevant pins 18 to 27 on PORTD. This was tested on a sun8i A33 tablet with an LVDS screen. MMC1 has the capability to use pins 2 to 7 on PORTD and the mux on those pins was being inadvertently set to setting 3 for MMC functionality which this patch corrects. Signed-off-by: Lawrence Yu <lyu@micile.com> [hdegoede@redhat.com: Only apply this change to A23 / A33] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | ARM: uniphier: support Debug UARTMasahiro Yamada2016-03-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | For ARM32 architecture, CONFIG_DEBUG_LL is available for early low-level debugging (and actually UniPhier 32bit SoCs use it), but ARM64 architecture does not support it. Instead, CONFIG_DEBUG_UART is available as an architecture-independent debug facility. This commit supports it on all the UniPhier SoCs (including the new ARMv8 SoCs), which is very useful for new SoC bringups. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: drop PH1- prefix from CONFIG options and file namesMasahiro Yamada2016-03-248-19/+19
| | | | | | | | | | | | | | | | The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too long. It would not hurt to drop "PH1_" because "UNIPHIER_" already well specifies the SoC family. Also, rename files for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mtd: denali: fix warning when compiled for 64bit systemMasahiro Yamada2016-03-241-3/+3
|/ | | | | | | | | | The 64-bit compiler (ex. aarch64) emits "warning: cast from pointer to integer of different size". Make it work with 64bit DMA address while I am here. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* net: Move CONFIG_RTL8169 to KconfigBin Meng2016-03-221-0/+6
| | | | | | | | | Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig to use that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Stephen Warren <swaren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: Move CONFIG_RTL8139 to KconfigBin Meng2016-03-221-0/+6
| | | | | | | | | | Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig to use that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> [trini: Fixup MPC8641HPCN* and r2dplus configs] Signed-off-by: Tom Rini <trini@konsulko.com>
* Fix spelling of "transferred".Vagrant Cascadian2016-03-222-3/+3
| | | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* serial: pl01x: Add support for devices with the rate pre-configured.Eric Anholt2016-03-221-2/+8
| | | | | | | | | | | | | For Raspberry Pi, we had the input clock rate to the pl011 fixed in the rpi.c file, but it may be changed by firmware due to user changes to config.txt. Since the firmware always sets up the uart (default 115200 output unless the user changes it), we can just skip our own uart init to simplify the boot process and more reliably get serial output. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-03-229-118/+446
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| * driver: net: fsl-mc: Return from DPAA_exit if boot_status !=0Prabhakar Kushwaha2016-03-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Return value of get_mc_boot_status() in case of failure is not necessary to be -1. So update the error condition check. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Yao Yuan <yao.yuan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: ldpaa_eth: Add support of PHY frameworkPrabhakar Kushwaha2016-03-211-34/+87
| | | | | | | | | | | | | | | | | | | | | | This patch integrate DPAA2 ethernet driver existing PHY framework. Call phy_connect and phy_config as per available DPMAC id defined in SerDes Protcol. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add workaround for erratum A-009803Shengzhou Liu2016-03-211-5/+39
| | | | | | | | | | | | | | | | | | During initial DDR training, false parity errors may be detected. This patch adds workaround to fix the erratum. Tested on LS2085QDS and LS2080RDB. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discreteShengzhou Liu2016-03-212-7/+63
| | | | | | | | | | | | | | | | | | | | Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * pci/layerscape: set LUT and msi-map for discovered PCI devicesStuart Yoder2016-03-211-0/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | msi-map properties are used to tell an OS how PCI requester IDs are mapped to ARM SMMU stream IDs. for all PCI devices discovered in a system: -allocate a LUT (look-up-table) entry in that PCI controller -allocate a stream ID for the device -program and enable a LUT entry (maps PCI requester id to stream ID) -set the msi-map property on the controller reflecting the LUT mapping basic bus scanning loop/logic was taken from drivers/pci/pci.c pci_hose_scan_bus(). Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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