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path: root/board/freescale/mpc8641hpcn/ddr.c
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* fsl-ddr: use the 1T timing as default configurationDave Liu2009-01-231-0/+2
* Coding Style cleanup, update CHANGELOGWolfgang Denk2008-11-021-8/+8
* Add DDR options setting on MPC8641HPCN boardHaiying Wang2008-10-181-36/+110
* Pass dimm parameters to populate populate controller optionsHaiying Wang2008-10-181-1/+4
* FSL DDR: Convert MPC8641HPCN to new DDR code.Kumar Gala2008-08-271-0/+88
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