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path: root/board/freescale/ls2080ardb/ddr.h
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* board/freescale: Update ddr clk_adjustShengzhou Liu2016-06-031-16/+16
* armv8/ls2080ardb: Update DDR timing to support more UDIMMsShengzhou Liu2016-05-171-3/+3
* armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-301-0/+92
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