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* imx:mx6ul add dram spl configuration and header filePeng Fan2015-08-023-10/+141
* imx: mx6 add PAD_CTL_SPEED_LOW for i.MX6SX/ULPeng Fan2015-08-021-0/+4
* imx: mx6ul update soc related settingsPeng Fan2015-08-021-5/+4
* imx: mx6ul select SYS_L2CACHE_OFFPeng Fan2015-08-021-0/+4
* imx:mx6ul add clock supportPeng Fan2015-08-022-90/+159
* imx-common: timer: add i.MX6UL supportPeng Fan2015-08-021-3/+5
* imx: mx6ul Add CONFIG_SYS_CACHELINE_SIZE for i.MX6ULPeng Fan2015-08-021-0/+4
* imx: mx6ul: Update imx registers head filePeng Fan2015-08-021-25/+35
* imx: mx6ul: Add pins IOMUX head filePeng Fan2015-08-022-0/+1067
* imx: mx6ul: Add i.MX6UL CPU typePeng Fan2015-08-022-1/+4
* arm: mx6: kconfig: don't select CPU_V7 per boardNikita Kiryanov2015-08-021-3/+0
* arm: mx6: cm-fx6: move cm-fx6 target under ARCH_MX6Nikita Kiryanov2015-08-022-8/+8
* imx: mx6qp Enable PRG clock for IPUPeng Fan2015-08-021-0/+5
* imx: mx6: hab : Remove the cache issue workaroud in hab for i.MX6QPYe.Li2015-08-021-1/+2
* imx: mx6: ccm: Change the clock settings for i.MX6QPPeng Fan2015-08-023-34/+49
* imx: add cpu type for i.MX6QP/DPPeng Fan2015-08-024-5/+16
* Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-07-1759-627/+1798
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| * Merge git://git.denx.de/u-boot-x86Tom Rini2015-07-1544-616/+1639
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| | * dm: x86: baytrail: Correct PCI region 3 when driver model is usedSimon Glass2015-07-141-0/+2
| | * dm: x86: minnowmax: Move PCI to use driver modelSimon Glass2015-07-143-47/+10
| | * x86: pci: Tidy up the generic x86 PCI driverSimon Glass2015-07-141-22/+0
| | * x86: Configure VESA parameters before loading Linux kernelBin Meng2015-07-142-0/+3
| | * x86: Remove MARK_GRAPHICS_MEM_WRCOMBBin Meng2015-07-141-8/+0
| | * x86: Move VGA option rom macros to KconfigBin Meng2015-07-141-0/+22
| | * x86: cmd_mtrr: Improve MTRR list informationBin Meng2015-07-141-1/+2
| | * x86: queensbay: Change CPU_ADDR_BITS to 32Bin Meng2015-07-141-0/+4
| | * x86: Setup fixed range MTRRs for legacy regionsBin Meng2015-07-142-11/+38
| | * x86: bios: Allow pci config read/write to host bridge in int1a_handlerJian Luo2015-07-141-9/+1
| | * x86: bios: Synchronize stack between real and protected modeJian Luo2015-07-141-0/+23
| | * x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-142-10/+23
| | * x86: Generate a valid MultiProcessor (MP) tableBin Meng2015-07-144-0/+181
| | * x86: Add MultiProcessor (MP) table APIsBin Meng2015-07-145-0/+688
| | * x86: Remove inline for lapic access routinesBin Meng2015-07-143-151/+153
| | * x86: Add I/O APIC register access routinesBin Meng2015-07-143-1/+46
| | * x86: Clean up ioapic header fileBin Meng2015-07-141-23/+3
| | * x86: Reduce PIRQ routing table sizeBin Meng2015-07-141-9/+56
| | * x86: Ignore function number when writing PIRQ routing tableBin Meng2015-07-141-4/+3
| | * x86: Write correct bus number for the irq routerBin Meng2015-07-141-1/+1
| | * x86: queensbay: Correct Topcliff device irqsBin Meng2015-07-141-12/+12
| | * x86: crownbay: Enable DM RTC supportBin Meng2015-07-142-0/+7
| | * x86: crownbay: Add MP initializationBin Meng2015-07-141-0/+20
| | * x86: Clean up lapic codesBin Meng2015-07-145-183/+103
| | * x86: Move lapic_setup() call into init_bsp()Bin Meng2015-07-142-3/+1
| | * x86: Move MP initialization codes into a common placeBin Meng2015-07-145-73/+112
| | * x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONSBin Meng2015-07-141-1/+0
| | * x86: kconfig: Fix minor nits in MAX_CPUSBin Meng2015-07-141-12/+12
| | * x86: kconfig: Make MAX_CPUS and AP_STACK_SIZE depend on SMPBin Meng2015-07-141-0/+2
| | * x86: dm: Clean up cpu driversBin Meng2015-07-146-55/+86
| | * x86: fsp: Move FspInitEntry call to board_init_f()Bin Meng2015-07-144-22/+21
| | * x86: fsp: Load GDT before calling FspInitEntryBin Meng2015-07-144-2/+33
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