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* Merge git://git.denx.de/u-boot-x86Tom Rini2014-11-2457-175/+6391
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| * x86: Rename chromebook-x86 to corebootSimon Glass2014-11-211-1/+1
| * x86: ivybridge: Implement SDRAM initSimon Glass2014-11-2119-5/+1861
| * x86: ivybridge: Add LAPIC supportSimon Glass2014-11-213-0/+163
| * x86: Make show_boot_progress() commonSimon Glass2014-11-212-24/+24
| * x86: chromebook_link: Enable GPIO supportSimon Glass2014-11-211-0/+3
| * x86: ivybridge: Add support for early GPIO initSimon Glass2014-11-214-6/+158
| * x86: ivybridge: Add early init for PCH devicesSimon Glass2014-11-217-1/+524
| * x86: dts: Add microcode updates for ivybridge CPUSimon Glass2014-11-213-0/+1382
| * x86: ivybridge: Perform Intel microcode update on bootSimon Glass2014-11-214-0/+177
| * x86: ivybridge: Check BIST value on bootSimon Glass2014-11-211-0/+16
| * x86: ivybridge: Perform initial CPU setupSimon Glass2014-11-214-0/+274
| * x86: Add msr read/write functions that use a structureSimon Glass2014-11-211-0/+19
| * x86: Add clr/setbits functionsSimon Glass2014-11-211-0/+49
| * x86: Tidy up coreboot header usageSimon Glass2014-11-213-6/+6
| * x86: ivybridge: Add early LPC init so that serial worksSimon Glass2014-11-215-0/+110
| * x86: pci: Allow configuration before relocationSimon Glass2014-11-212-0/+63
| * x86: ivybridge: Enable PCI in early initSimon Glass2014-11-213-0/+67
| * x86: Support use of PCI before relocationSimon Glass2014-11-213-0/+31
| * x86: Refactor PCI to permit alternate initSimon Glass2014-11-214-15/+46
| * x86: chromebook_link: Implement CAR support (cache as RAM)Simon Glass2014-11-215-3/+311
| * x86: Emit post codes in startup code for ChromebooksSimon Glass2014-11-213-1/+38
| * x86: Build a .rom file which can be flashed to an x86 machineSimon Glass2014-11-211-0/+13
| * x86: Add chromebook_link boardSimon Glass2014-11-2110-0/+298
| * x86: Allow timer calibration to work on ivybridgeSimon Glass2014-11-211-11/+21
| * x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada2014-11-211-6/+6
| * x86: Replace fill_processor_name() with cpu_get_name()Simon Glass2014-11-214-15/+24
| * x86: Remove unnecessary find_fdt(), prepare_fdt() functionsSimon Glass2014-11-212-29/+0
| * x86: Add processor functions to halt and get stack pointerSimon Glass2014-11-211-0/+19
| * x86: Fix a warning with gcc 4.4.4Simon Glass2014-11-211-0/+1
| * x86: Save TSC frequency in the global dataBin Meng2014-11-212-0/+5
| * x86: Add quick TSC calibration via PITBin Meng2014-11-212-0/+159
| * x86: Do TSC MSR calibration only for known/supported CPUsBin Meng2014-11-211-7/+108
| * x86: Do CPU identification in the early phaseBin Meng2014-11-213-47/+398
| * x86: Save the BIST value on resetSimon Glass2014-11-213-4/+13
| * x86: Fix up some missing prototypesSimon Glass2014-11-215-8/+14
| * x86: Use the standard arch_cpu_init() functionSimon Glass2014-11-213-7/+6
| * x86: Use the standard dram_init() functionSimon Glass2014-11-212-9/+6
| * x86: Tidy up global descriptor table setupSimon Glass2014-11-211-3/+16
| * x86: Invalidate TLB as early as possibleSimon Glass2014-11-211-0/+3
| * x86: Remove board_init16() call which is not usedSimon Glass2014-11-211-9/+1
| * x86: Remove REALMODE_BASE which is no longer usedSimon Glass2014-11-211-1/+0
* | x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada2014-11-232-7/+7
* | kbuild: Descend into SOC directory from CPU directoryMasahiro Yamada2014-11-231-0/+2
* | linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2014-11-232-2/+2
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* x86: Correct a few progress message nitsSimon Glass2014-10-282-3/+3
* x86: bootm: Support booting a 64-bit raw kernelSimon Glass2014-10-281-2/+8
* x86: Move kernel boot function to arch/x86/lib/bootm.cSimon Glass2014-10-284-48/+63
* x86: Add support for starting 64-bit kernelSimon Glass2014-10-284-1/+165
* x86: Display basic CPU information on bootSimon Glass2014-10-282-0/+71
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