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* x86: Drop pci_type1.c and DEFINE_PCI_DEVICE_TABLEBin Meng2016-02-051-7/+0
| | | | | | | | | Now that we have converted all x86 codes to DM PCI, drop pci_type1.c which is only built for legacy PCI. Also per checkpatch.pl warning, DEFINE_PCI_DEVICE_TABLE is now deprecated so drop that too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: pci: Drop legacy PCI APIsBin Meng2016-02-051-12/+0
| | | | | | | | | Now that we have converted all x86 codes to use DM PCI APIs, drop those legacy ones. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: Remove legacy pci codesBin Meng2015-11-131-21/+0
| | | | | | | | Now that we have converted all x86 boards to use driver model pci, remove these legacy pci codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: pci: Assign pci irqs to all functionsBin Meng2015-07-281-2/+1
| | | | | | | | We need walk through all functions within a PCI device and assign their IRQs accordingly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Add a function to assign IRQ numbers to PCI deviceBin Meng2015-04-291-0/+14
| | | | | | | | | Add a function to assign an IRQ number to PCI device's interrupt line register in its configuration space, so that the PCI device can have its interrupt working under PIC mode after OS boots up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: x86: pci: Add a PCI driver for driver modelSimon Glass2015-04-181-0/+8
| | | | | | | Add a simple x86 PCI driver which uses standard functions provided by the architecture. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add a x86_ prefix to the x86-specific PCI functionsSimon Glass2015-04-161-6/+6
| | | | | | | | | | | | These functions currently use a generic name, but they are for x86 only. This may introduce confusion and prevents U-Boot from using these names more widely. In fact it should be possible to remove these at some point and use generic functions, but for now, rename them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Define macros for pci configuration space accessBin Meng2015-02-061-2/+11
| | | | | | | | | Move PCI_REG_ADDR and PCI_REG_DATA from arch/x86/lib/pci_type1.c to arch/x86/include/asm/pci.h, also define PCI_CFG_EN so that these macros can be used for pci configuration space access. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* pci: Make pci apis usable before relocationBin Meng2015-01-121-1/+1
| | | | | | | | | | | | | | Introduce a gd->hose to save the pci hose in the early phase so that apis in drivers/pci/pci.c can be used before relocation. Architecture codes need assign a valid gd->hose in the early phase. Some variables are declared as static so change them to be either stack variable or global data member so that they can be used before relocation, except the 'indent' used by CONFIG_PCI_SCAN_SHOW which just affects some print format. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: pci: Add handlers before and after a PCI hose scanSimon Glass2014-11-251-0/+3
| | | | | | | | Some boards will want to do some setup before and after a PCI hose is scanned. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: pci: Allow configuration before relocationSimon Glass2014-11-211-0/+13
| | | | | | | | | | Add simple PCI access routines for x86 which permit use before relocation. The normal PCI stack is still used, but for pre-relocation use there can only ever be a single hose. After relocation, fall back to the normal access, although even then on x86 machines there is normally only a single PCI bus. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Support use of PCI before relocationSimon Glass2014-11-211-0/+9
| | | | | | | | Add support for using PCI before SDRAM is available, using early malloc() and global_data. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Refactor PCI to permit alternate initSimon Glass2014-11-211-0/+11
| | | | | | | | | | | | | We want access PCI earlier in the init sequence, so refactor the code so that it does not require use of a BSS variable to work. This will allow us to use early malloc() to store information about a PCI hose. Common PCI code moves to arch/x86/cpu/pci.c and a new board_pci_setup_hose() function is provided by boards to set up the (single) hose used by that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* cosmetic: remove empty lines at the top of fileMasahiro Yamada2013-11-081-1/+0
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* x86: Remove unused bios/pci codeSimon Glass2013-05-131-4/+0
| | | | | | | Graeme Russ pointed out that this code is no longer used. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: coreboot: Tell u-boot about PCI bus 0 when initializingGabe Black2012-11-281-1/+1
| | | | | | | | | | | | | | | | | U-boot needs a host controller or "hose" to interact with the PCI busses behind them. This change installs a host controller during initialization of the coreboot "board" which implements some of X86's basic PCI semantics. This relies on some existing generic code, but also duplicates a little bit of code from the sc520 implementation. Ideally we'd eliminate that duplication at some point. It looks like in order to scan buses beyond bus 0, we'll need to tell u-boot's generic PCI configuration code what to do if it encounters a bridge, specifically to scan the bus on the other side of it. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Misc PCI touchupsGraeme Russ2011-11-291-1/+1
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* cosmetic: checkpatch cleanup of arch/x86/lib/*.cGraeme Russ2011-11-291-0/+3
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Convert ISO-8859 files to UTF-8Albert ARIBAUD2011-08-041-1/+1
| | | | | | | | There was a mix of UTF-8 and ISO-8859 files in the U-Boot source tree, which could cause issues with the patchwork review system. This commit converts all ISO-8859 files to UTF-8. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* x86: Rename i386 to x86Graeme Russ2011-04-131-0/+34
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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