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path: root/arch/x86/cpu/coreboot
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* x86: Call board_final_cleanup() in last_stage_init()Bin Meng2016-05-231-9/+11
* x86: Move asm/arch-coreboot/tables.h to a common placeBin Meng2016-03-172-2/+0
* dm: x86: spi: Convert ICH SPI driver to driver model PCI APISimon Glass2016-01-241-1/+2
* x86: Convert to use driver model timerBin Meng2015-12-011-22/+0
* x86: coreboot: Convert to use more dm driversBin Meng2015-09-091-6/+0
* x86: coreboot: Allow >=4GiB memory bank sizeBin Meng2015-08-261-5/+4
* x86: Remove calculate_relocation_address()Bin Meng2015-08-261-8/+1
* x86: coreboot: Correctly report E820 typesBin Meng2015-08-261-2/+13
* x86: pci: Tidy up the generic x86 PCI driverSimon Glass2015-07-141-22/+0
* x86: qemu: Implement PIRQ routingBin Meng2015-06-041-0/+5
* x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng2015-06-041-3/+9
* x86: coreboot: Fix cosmetic issuesBin Meng2015-06-041-24/+3
* x86: link: Add PCH driver to support SPI FlashSimon Glass2015-04-291-0/+11
* dm: x86: pci: Convert coreboot to use driver model for pciSimon Glass2015-04-181-47/+16
* x86: Support machines with >4GB of RAMSimon Glass2015-04-161-2/+4
* x86: config: Enable hook for saving MRC configurationSimon Glass2015-01-241-0/+5
* x86: Use ipchecksum from net/Simon Glass2015-01-243-60/+4
* x86: coreboot: Configure pci memory regionsBin Meng2015-01-131-2/+28
* x86: coreboot: Move coreboot-specific defines from coreboot.h to KconfigBin Meng2015-01-131-0/+15
* x86: coreboot: Set up timer base correctlyBin Meng2015-01-131-13/+20
* x86: Add support for MTRRsSimon Glass2015-01-131-12/+10
* Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada2014-12-081-1/+2
* x86: Remove board_early_init_r()Simon Glass2014-11-251-11/+0
* Merge git://git.denx.de/u-boot-x86Tom Rini2014-11-245-59/+28
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| * x86: Make show_boot_progress() commonSimon Glass2014-11-211-24/+0
| * x86: Tidy up coreboot header usageSimon Glass2014-11-213-6/+6
| * x86: Refactor PCI to permit alternate initSimon Glass2014-11-211-15/+7
| * x86: Emit post codes in startup code for ChromebooksSimon Glass2014-11-211-1/+2
| * x86: Add chromebook_link boardSimon Glass2014-11-211-0/+1
| * x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada2014-11-211-6/+6
| * x86: Replace fill_processor_name() with cpu_get_name()Simon Glass2014-11-211-0/+5
| * x86: Fix up some missing prototypesSimon Glass2014-11-212-5/+3
| * x86: Use the standard arch_cpu_init() functionSimon Glass2014-11-211-6/+5
| * x86: Use the standard dram_init() functionSimon Glass2014-11-211-7/+4
* | x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada2014-11-231-6/+6
* | linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2014-11-232-2/+2
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* kbuild: move asm-offsets.c from SoC directory to arch/$(ARCH)/libMasahiro Yamada2014-03-281-22/+0
* x86: convert makefiles to Kbuild styleMasahiro Yamada2013-11-011-28/+7
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-142-2/+2
* SPDX-License-Identifier: convert BSD-3-Clause filesWolfgang Denk2013-08-191-22/+1
* config: don't define CONFIG_ARCH_DEVICE_TREEStephen Warren2013-08-021-7/+0
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-247-106/+7
* x86: Add coreboot timestampsSimon Glass2013-05-131-0/+3
* x86: Support adding coreboot timestanps to bootstageSimon Glass2013-05-131-0/+38
* x86: Add TSC timerSimon Glass2013-05-131-1/+3
* x86: Implement panic output for corebootSimon Glass2013-05-131-0/+10
* x86: Fix DRAM bank size init with generic boardSimon Glass2013-04-151-1/+6
* x86: Use sections header to obtain link symbolsSimon Glass2013-03-151-0/+1
* x86: Permit bootstage and timer data to be used prior to relocationSimon Glass2013-03-041-9/+6
* x86: Add function to get top of usable ramSimon Glass2013-03-041-14/+4
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