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:
blackbird-obmc-uboot
v2016.07-aspeed-openbmc-04-16-2019
v2016.07-aspeed-openbmc-04-16-2019-i2c
Blackbird™ U-Boot sources for OpenBMC
Raptor Computing Systems
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path:
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/
arch
/
mips
/
cpu
/
mips32
/
cache.S
Commit message (
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)
Author
Age
Files
Lines
*
mips32: detect L1 cache sizes if they're not defined
Paul Burton
2013-11-09
1
-13
/
+77
*
MIPS: mips32/cache.S: use v1 register for indirect function calls
Gabor Juhos
2013-07-24
1
-4
/
+4
*
MIPS: mips32/cache.S: store cache line size in t8 register
Gabor Juhos
2013-07-24
1
-3
/
+3
*
MIPS: mips32/cache.S: save return address in t9 register
Gabor Juhos
2013-07-24
1
-1
/
+1
*
MIPS: mips32/cache.S: remove superfluous register assignment
Gabor Juhos
2013-07-24
1
-2
/
+1
*
Add GPL-2.0+ SPDX-License-Identifier to source files
Wolfgang Denk
2013-07-24
1
-17
/
+1
*
MIPS: don't use camel-case style
Zhi-zhou Zhang
2012-10-16
1
-5
/
+5
*
MIPS: fix inconsistency in config option for cache operation mode
Daniel Schwierzeck
2012-04-02
1
-1
/
+5
*
MIPS: Coding style cleanups on common assembly files
Shinya Kuribayashi
2011-05-07
1
-43
/
+38
*
MIPS: Remove mips_cache_lock() feature
Shinya Kuribayashi
2011-05-07
1
-93
/
+0
*
MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32
Daniel Schwierzeck
2011-04-02
1
-0
/
+328