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* omap4: add sdram init supportAneesh V2011-08-034-3/+464
| | | | | | | Add support for the SDRAM controller (EMIF). Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add clock supportAneesh V2011-08-033-0/+811
| | | | | | | | | | | | | | Add support for: 1. DPLL locking 2. Initialization of clock domains and clock modules 3. Setting up the right voltage on voltage rails This work draws upon previous work done for x-loader by: Santosh Shilimkar <santosh.shilimkar@ti.com> Rajendra Nayak <rnayak@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add OMAP4430 revision checkAneesh V2011-08-031-0/+64
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: cleanup pin mux dataAneesh V2011-08-032-3/+126
| | | | | | | | | | | | | - separate mux settings into essential and non essential parts - essential part is board independent as of now(so move it to SoC directory). Will help in having single SPL for all boards. - Non-essential part(the pins not essential for u-boot to function) need to be phased out eventually. - Correct mux data by aligning to the latest settings in x-loader Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Include array definition only when it is usedSanjeev Premi2011-08-031-0/+3
| | | | | | | | | | | | The array of strings corresponding to cpu revision is used only when CONFIG_DISPLAY_CPUINFO is selected - in the function print_cpuinfo(). Enclose definition of this array in #ifdef...#endif for the same. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* cleanup: Fix typos and misspellings in various files.Mike Williams2011-07-2811-13/+13
| | | | | | | | | | | Recieve/Receive recieve/receive Interupt/Interrupt interupt/interrupt Addres/Address addres/address Signed-off-by: Mike Williams <mike@mikebwilliams.com>
* Timer: Remove reset_timer_masked()Graeme Russ2011-07-2625-193/+43
| | | | | | | In some circumstances, reset_timer_masked() was called be timer_init() in order to perform architecture specific timer initialisation. In such cases, the required code in reset_timer_masked() has been moved into timer_init()
* Timer: Fix at91rm9200/spi.c timer usageGraeme Russ2011-07-261-2/+3
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* Timer: Remove reset_timer() for non-Nios2 archesGraeme Russ2011-07-2635-194/+7
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* Timer: Remove set_timer completelyGraeme Russ2011-07-2632-160/+0
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* replace CONFIG_PRELOADER with CONFIG_SPL_BUILDAneesh V2011-07-2614-57/+57
| | | | | | replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD Signed-off-by: Aneesh V <aneesh@ti.com>
* ARM: MX5: Fix broken leftover TO-2 errata workaroundDavid Jander2011-07-181-1/+5
| | | | | | | | This check was broken. r3 does not contain the silicon revision anymore, so we need to reload it. Also, this errata only applies to i.MX51. Signed-off-by: David Jander <david@protonic.nl> Acked-by: Stefano Babic <sbabic@denx.de>
* MX31: Cleanup clock functionStefano Babic2011-07-181-1/+20
| | | | | | | The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de>
* Remove volatile qualifier in get_ram_size() callsAlbert ARIBAUD2011-07-171-2/+2
| | | | | | | | | Checkpatch.pl complains about the volatile qualifier in calls to get_ram_size(). Remove this qualifier in the prototype and in the calls where it is useless, and leave it only in the function body where it is needed. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7Rob Herring2011-07-171-0/+2
| | | | | | | | cpu_init_crit can be skipped, but the code is still enabled requiring a platform to supply lowlevel_init. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Albert ARIBAUD <albert.aribaud@free.fr>
* MX27: Update to autogenerated asm-offsets.hStefano Babic2011-07-142-0/+47
| | | | | | | On i.MX27, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>
* MX5: Update to autogenerated asm-offsets.hStefano Babic2011-07-142-0/+78
| | | | | | | On i.MX5, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>
* imx: Add auto generation of asm-offsets.h for imx25Matthias Weisser2011-07-142-0/+62
| | | | | | | Offsets to registers may be needed in asm code. This patch adds automated generation of these offsets form C structures. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* imx: Use correct imx25 reset.cMatthias Weisser2011-07-141-4/+2
| | | | | | imx25 used the wrong reset.c from imx27 Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* imx: Add get_tbclk() function for imx25Matthias Weisser2011-07-141-0/+12
| | | | | | Need this function for autoboot keyd Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* mx27: Make the UART port number explicitFabio Estevam2011-07-141-1/+1
| | | | | | | | mx27_uart_init_pins does the IOMUX setting for UART1 port. Change the function name to make the UART port number explicit. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* build: Add targets for auto gen of asm-offsets.h and use it in imx35Matthias Weisser2011-07-141-11/+0
| | | | | | | | asm-offsets.h should be auto generated. This patch adds two rules to rules.mk which makes this possible and removes the rules on imx35. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Stefano Babic <sbabic@denx.de>
* arm920t/at91: add at91rm9200_devices.cAndreas Bießmann2011-07-042-0/+86
| | | | | | | This is a copy of arm926ejs/at91 api for perpherial initialisation. At the moment we just need the usart part of the api. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm920t/at91: use new clock.c featuresAndreas Bießmann2011-07-042-0/+44
| | | | | | | | | This patch enables the new clock features from arm920t/at91/clock.c. This is an required step to get at91rm9200_usart replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Jens Scharsig <js_at_ng@scharsoft.de> Cc: Eric Bénard <eric@eukrea.com>
* arm920t/at91: add clock.cAndreas Bießmann2011-07-043-34/+162
| | | | | | | This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The arm926ejs specialities are removed from arm920t version and vice versa. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* MX5: Introduce a function for setting the chip select sizeFabio Estevam2011-07-041-0/+30
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* OMAP[34]: fix broken timerJohn Rigby2011-07-041-3/+4
| | | | | | | | | | | | | | | | | | | | As implemented now the timer used to implement __udelay counts to 0xffffffff and then gets stuck there because the the programmed reload value is 0xffffffff. This value is not only wrong but illegal according to the reference manual. One can reproduce the bug by leaving a board at the u-boot prompt for sometime then issuing a sleep command. The sleep will hang forever. The timer is a count up timer that reloads as it rolls over from 0xffffffff so the correct load value is 0. Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff. Signed-off-by: John Rigby <john.rigby@linaro.org> Tested-by: Igor Grinberg <grinberg@compulab.co.il>
* armv7: adapt s5pc1xx to the new cache maintenance frameworkAneesh V2011-07-041-82/+6
| | | | | | adapt s5pc1xx to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap3 to the new cache maintenance frameworkAneesh V2011-07-044-283/+149
| | | | | | adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap4 to the new cache maintenance frameworkAneesh V2011-07-042-0/+21
| | | | | | adapt omap4 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: integrate cache maintenance supportAneesh V2011-07-042-27/+38
| | | | | | | | | | - Enable I-cache on bootup - Enable MMU and D-cache immediately after relocation - Do necessary initialization before enabling d-cache and MMU - Changes to cleanup_before_linux() - Make changes according to the new framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: rename cache related CONFIG flagsAneesh V2011-07-042-5/+2
| | | | | | | | | | | | | | | | Replace the cache related CONFIG flags with more meaningful names. Following are the changes: CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF Signed-off-by: Aneesh V <aneesh@ti.com> V2: * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE V4: * Changed all three flags to the final names suggested as above and accordingly changed the commit message
* armv7: cache maintenance operations for armv7Aneesh V2011-07-042-1/+395
| | | | | | | | | | | | | | | | | | | | | | | | | | - Add a framework for layered cache maintenance - separate out SOC specific outer cache maintenance from maintenance of caches known to CPU - Add generic ARMv7 cache maintenance operations that affect all caches known to ARMv7 CPUs. For instance in Cortex-A8 these opertions will affect both L1 and L2 caches. In Cortex-A9 these will affect only L1 cache - D-cache operations supported: - Invalidate entire D-cache - Invalidate D-cache range - Flush(clean & invalidate) entire D-cache - Flush D-cache range - I-cache operations supported: - Invalidate entire I-cache - Add maintenance functions for TLB, branch predictor array etc. - Enable -march=armv7-a so that armv7 assembly instructions can be used Signed-off-by: Aneesh V <aneesh@ti.com>
* Minor coding style fixes.Wolfgang Denk2011-06-271-3/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-06-237-156/+120
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: run arm_pci_init after relocation IXP42x PCI rewrite update/fix PDNB3 board update/fix IXDP425 / IXDPG425 boards add dvlhost (dLAN 200 AV Wireless G) board IXP NPE: add support for fixed-speed MII ports update/fix AcTux4 board update/fix AcTux3 board update/fix AcTux2 board update/fix AcTux1 board use -ffunction-sections / --gc-sections on IXP42x support CONFIG_SYS_LDSCRIPT on ARM fix "depend" target in npe directory Fix IXP code to work after relocation was added trigger hardware watchdog in IXP42x serial driver add support for IXP42x Rev. B1 and newer add XScale sub architecture (IXP/PXA) to maintainer list Conflicts: arch/arm/lib/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * IXP NPE: add support for fixed-speed MII portsMichael Schwingen2011-06-231-25/+42
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * use -ffunction-sections / --gc-sections on IXP42xMichael Schwingen2011-06-232-4/+9
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * fix "depend" target in npe directoryMichael Schwingen2011-06-231-0/+1
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * Fix IXP code to work after relocation was addedMichael Schwingen2011-06-233-125/+63
| | | | | | | | | | | | | | - jump to real flash location after reset before turning off flash mirror - fix timer system to use HZ == 1000, remove broken interrupt-based code Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * add support for IXP42x Rev. B1 and newerMichael Schwingen2011-06-231-2/+5
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
* | ARM: drop unsupported 'trab' boardWolfgang Denk2011-06-221-7/+1
|/ | | | | | | | | | The 'trab' board configuration is broken, and there is nobody who is interested and willing to fix it. Drop it. This includes support for VFD displays which have always been used by this board only. Signed-off-by: Wolfgang Denk <wd@denx.de>
* arm926ejs/at91/lowlevel_init.S: fix definesEric Benard2011-06-211-12/+12
| | | | | | atmel rework changed define names which broke this file Signed-off-by: Eric Bénard <eric@eukrea.com>
* update arm/at91rm9200 work with rework rework110202Jens Scharsig2011-06-212-7/+7
| | | | | | | | | | | * convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme * Fix: timer.c compile error io.h not found with arm/at91rm9200 * update arm920t/at91 to ATMEL_xxx name scheme * update arm920t/at91 soc lib * update at91_emac driver Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
* Minor coding style cleanupWolfgang Denk2011-06-021-3/+3
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* armv7: Add ST-Ericsson u8500 archJohn Rigby2011-06-014-0/+291
| | | | | | | | Based on ST-Ericsson internal git repo. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> CC: Albert Aribaud <albert.aribaud@free.fr>
* S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1)Minkyu Kang2011-05-261-20/+26
| | | | | | | The source of pwm clock is fixed at evt1. And some registers for pwm clock are removed. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: add set_mmc_clk for external clock controlJaehoon Chung2011-05-262-0/+37
| | | | | | | | | | | This patch added set_mmc_clk for external clock control. c210 didn't support host clock control. So We need external_clock_control function for c210. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5PC2XX: Support the cpu revisionMinkyu Kang2011-05-261-0/+2
| | | | | | | | S5PC210 SoC have two cpu revisions, and have some difference. So, support the cpu revision for each revision. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5P:SROM config code moved to s5p-common directoryChander Kashyap2011-05-263-13/+13
| | | | | | | | | SROM config code is made common for S5P series of boards. smdkc100.c now refers to s5p-common/sromc.c for SROM related subroutines. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* MX31: Make get_reset_cause() static and drop unreachable codeStefano Babic2011-05-231-5/+1
| | | | | | | | get_reset_cause() should not be exported. Drop code in the function after return statement that can generate warnings due to unreachable code. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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