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| author | Chander Kashyap <chander.kashyap@linaro.org> | 2011-04-14 19:05:18 +0000 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2011-05-26 19:30:46 +0900 |
| commit | b0ad8621777048c2781393a8b6a42112598218cf (patch) | |
| tree | 3282f59d6f48971ce0162eacc1699f0602273c95 /arch/arm/cpu | |
| parent | 920c428d0a871eb6fe1c127a0b01385b1c56b0c2 (diff) | |
| download | blackbird-obmc-uboot-b0ad8621777048c2781393a8b6a42112598218cf.tar.gz blackbird-obmc-uboot-b0ad8621777048c2781393a8b6a42112598218cf.zip | |
S5P:SROM config code moved to s5p-common directory
SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/s5p-common/Makefile | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/s5p-common/sromc.c (renamed from arch/arm/cpu/armv7/s5pc1xx/sromc.c) | 22 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/Makefile | 1 |
3 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile index ce0a41e2c1..17053995bd 100644 --- a/arch/arm/cpu/armv7/s5p-common/Makefile +++ b/arch/arm/cpu/armv7/s5p-common/Makefile @@ -27,7 +27,8 @@ LIB = $(obj)libs5p-common.o COBJS-y += cpu_info.o COBJS-y += timer.o -COBJS-$(CONFIG_PWM) += pwm.o +COBJS-y += sromc.o +COBJS-$(CONFIG_PWM) += pwm.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) diff --git a/arch/arm/cpu/armv7/s5pc1xx/sromc.c b/arch/arm/cpu/armv7/s5p-common/sromc.c index 044d12298d..091e8d18ab 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/sromc.c +++ b/arch/arm/cpu/armv7/s5p-common/sromc.c @@ -23,27 +23,27 @@ #include <common.h> #include <asm/io.h> -#include <asm/arch/smc.h> +#include <asm/arch/sromc.h> /* - * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the - * band width control and bank control registers - * srom_bank - SROM Bank 0 to 5 - * smc_bw_conf - SMC Band witdh reg configuration value - * smc_bc_conf - SMC Bank Control reg configuration value + * s5p_config_sromc() - select the proper SROMC Bank and configure the + * band width control and bank control registers + * srom_bank - SROM + * srom_bw_conf - SMC Band witdh reg configuration value + * srom_bc_conf - SMC Bank Control reg configuration value */ -void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf) +void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf) { u32 tmp; - struct s5pc1xx_smc *srom = - (struct s5pc1xx_smc *)samsung_get_base_sromc(); + struct s5p_sromc *srom = + (struct s5p_sromc *)samsung_get_base_sromc(); /* Configure SMC_BW register to handle proper SROMC bank */ tmp = srom->bw; tmp &= ~(0xF << (srom_bank * 4)); - tmp |= smc_bw_conf; + tmp |= srom_bw_conf; srom->bw = tmp; /* Configure SMC_BC register */ - srom->bc[srom_bank] = smc_bc_conf; + srom->bc[srom_bank] = srom_bc_conf; } diff --git a/arch/arm/cpu/armv7/s5pc1xx/Makefile b/arch/arm/cpu/armv7/s5pc1xx/Makefile index b182bf5a49..d66314e2b0 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/Makefile +++ b/arch/arm/cpu/armv7/s5pc1xx/Makefile @@ -32,7 +32,6 @@ SOBJS = cache.o SOBJS += reset.o COBJS += clock.o -COBJS += sromc.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) |
