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* tegra30: add SBC1 to periph id mapping tableAllen Martin2013-02-111-1/+1
| | | | | | | | SBC1 is SPI controller 1 on tegra30 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra: Move common clock code to arch/arm/cpu/tegra-common/clock.cTom Warren2013-02-111-598/+114
| | | | | | | | | This 'commonizes' much of the clock/pll code. SoC-dependent code and tables are left in arch/cpu/tegraXXX-common/clock.c Some T30 tables needed whitespace fixes due to checkpatch complaints. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra30: clocks: Fix clock tables for I2C and other periphsTom Warren2013-01-161-34/+44
| | | | | | | Add 16-bit divider support (I2C) to periph table, annotate and correct some entries, and fix clk_id lookup function. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra30: Add common CPU (shared) filesTom Warren2013-01-164-0/+1699
These files are used by both SPL and main U-Boot. Also made minor changes to shared Tegra code to support T30 differences. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
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