summaryrefslogtreecommitdiffstats
path: root/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
Commit message (Expand)AuthorAgeFilesLines
* arm64: fsl-layerscape: add get_svr and IS_SVR_REV helperSriram Dash2016-06-131-0/+7
* armv8: fsl-layerscape: Remove unnecessary flushing dcacheAlison Wang2016-05-181-3/+0
* armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-061-3/+6
* arm64: Fix layerscape mmu setupAlexander Graf2016-03-211-0/+5
* arm64: Remove non-full-va map codeAlexander Graf2016-03-151-5/+32
* armv8: fsl-layerscale: Rewrite reserving memory for MC and debug serverYork Sun2015-12-151-0/+21
* armv8: fsl-layerscape: Make DDR non secure in MMU tablesYork Sun2015-12-151-14/+107
* armv8: ls2085a: Add workaround of errata A009635Prabhakar Kushwaha2015-11-301-0/+6
* armv8/layerscape: Update MMU table with execute-never bitsAlison Wang2015-11-301-1/+1
* armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-301-1/+1
* armv8/ls1043a: Add Fman supportShaohui Xie2015-10-291-0/+12
* armv8/fsl_lsch2: Add fsl_lsch2 SoCMingkai Hu2015-10-291-0/+13
* armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu2015-10-291-0/+514
OpenPOWER on IntegriCloud