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-rw-r--r--drivers/mtd/spi/sf_internal.h3
-rw-r--r--drivers/mtd/spi/spi_flash.c62
2 files changed, 63 insertions, 2 deletions
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 561abc3992..55ba81e87b 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -77,6 +77,7 @@ enum spi_nor_option_flags {
#define CMD_WRITE_DISABLE 0x04
#define CMD_WRITE_ENABLE 0x06
#define CMD_QUAD_PAGE_PROGRAM 0x32
+#define CMD_WRITE_EVCR 0x61
/* Read commands */
#define CMD_READ_ARRAY_SLOW 0x03
@@ -90,6 +91,7 @@ enum spi_nor_option_flags {
#define CMD_READ_STATUS1 0x35
#define CMD_READ_CONFIG 0x35
#define CMD_FLAG_STATUS 0x70
+#define CMD_READ_EVCR 0x65
/* Bank addr access commands */
#ifdef CONFIG_SPI_FLASH_BAR
@@ -104,6 +106,7 @@ enum spi_nor_option_flags {
#define STATUS_QEB_WINSPAN BIT(1)
#define STATUS_QEB_MXIC BIT(6)
#define STATUS_PEC BIT(7)
+#define STATUS_QEB_MICRON BIT(7)
#define SR_BP0 BIT(2) /* Block protect 0 */
#define SR_BP1 BIT(3) /* Block protect 1 */
#define SR_BP2 BIT(4) /* Block protect 2 */
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index e4b8ce97be..d9124c5fc5 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -111,6 +111,37 @@ static int write_cr(struct spi_flash *flash, u8 wc)
}
#endif
+#ifdef CONFIG_SPI_FLASH_STMICRO
+static int read_evcr(struct spi_flash *flash, u8 *evcr)
+{
+ int ret;
+ const u8 cmd = CMD_READ_EVCR;
+
+ ret = spi_flash_read_common(flash, &cmd, 1, evcr, 1);
+ if (ret < 0) {
+ debug("SF: error reading EVCR\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int write_evcr(struct spi_flash *flash, u8 evcr)
+{
+ u8 cmd;
+ int ret;
+
+ cmd = CMD_WRITE_EVCR;
+ ret = spi_flash_write_common(flash, &cmd, 1, &evcr, 1);
+ if (ret < 0) {
+ debug("SF: error while writing EVCR register\n");
+ return ret;
+ }
+
+ return 0;
+}
+#endif
+
#ifdef CONFIG_SPI_FLASH_BAR
static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
{
@@ -843,6 +874,34 @@ static int spansion_quad_enable(struct spi_flash *flash)
}
#endif
+#ifdef CONFIG_SPI_FLASH_STMICRO
+static int micron_quad_enable(struct spi_flash *flash)
+{
+ u8 qeb_status;
+ int ret;
+
+ ret = read_evcr(flash, &qeb_status);
+ if (ret < 0)
+ return ret;
+
+ if (!(qeb_status & STATUS_QEB_MICRON))
+ return 0;
+
+ ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON);
+ if (ret < 0)
+ return ret;
+
+ /* read EVCR and check it */
+ ret = read_evcr(flash, &qeb_status);
+ if (!(ret >= 0 && !(qeb_status & STATUS_QEB_MICRON))) {
+ printf("SF: Micron EVCR Quad bit not clear\n");
+ return -EINVAL;
+ }
+
+ return ret;
+}
+#endif
+
static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
{
switch (idcode0) {
@@ -857,8 +916,7 @@ static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO
case SPI_FLASH_CFI_MFR_STMICRO:
- debug("SF: QEB is volatile for %02x flash\n", idcode0);
- return 0;
+ return micron_quad_enable(flash);
#endif
default:
printf("SF: Need set QEB func for %02x flash\n", idcode0);
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