diff options
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/bfin_nand.c | 16 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 6 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_ids.c | 1 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_plat.c | 11 |
4 files changed, 25 insertions, 9 deletions
diff --git a/drivers/mtd/nand/bfin_nand.c b/drivers/mtd/nand/bfin_nand.c index 6d3d45019c..3ee060f859 100644 --- a/drivers/mtd/nand/bfin_nand.c +++ b/drivers/mtd/nand/bfin_nand.c @@ -26,6 +26,7 @@ #include <nand.h> #include <asm/blackfin.h> +#include <asm/portmux.h> /* Bit masks for NFC_CTL */ @@ -337,6 +338,12 @@ static struct nand_ecclayout bootrom_ecclayout = { */ int board_nand_init(struct nand_chip *chip) { + const unsigned short pins[] = { + P_NAND_CE, P_NAND_RB, P_NAND_D0, P_NAND_D1, P_NAND_D2, + P_NAND_D3, P_NAND_D4, P_NAND_D5, P_NAND_D6, P_NAND_D7, + P_NAND_WE, P_NAND_RE, P_NAND_CLE, P_NAND_ALE, 0, + }; + pr_stamp(); /* set width/ecc/timings/etc... */ @@ -347,14 +354,7 @@ int board_nand_init(struct nand_chip *chip) bfin_write_NFC_IRQSTAT(0xffff); /* enable GPIO function enable register */ -#ifdef __ADSPBF54x__ - bfin_write_PORTJ_FER(bfin_read_PORTJ_FER() | 6); -#elif defined(__ADSPBF52x__) - bfin_write_PORTH_FER(bfin_read_PORTH_FER() | 0xFCFF); - bfin_write_PORTH_MUX(0); -#else -# error no support for this variant -#endif + peripheral_request_list(pins, "bfin_nand"); chip->cmd_ctrl = bfin_nfc_cmd_ctrl; chip->read_buf = bfin_nfc_read_buf; diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 7171bdd51b..ed1c9c9a88 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2652,8 +2652,12 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, } } - if (!type) + if (!type) { + printk(KERN_INFO "%s: unknown NAND device: Manufacturer ID:" + " 0x%02x, Chip ID: 0x%02x\n", __func__, + *maf_id, dev_id); return ERR_PTR(-ENODEV); + } if (!mtd->name) mtd->name = type->name; diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 077c3051bc..25b22ecc92 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -83,6 +83,7 @@ struct nand_flash_dev nand_flash_ids[] = { /* 1 Gigabit */ {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS}, {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS}, + {"NAND 128MiB 3,3V 8-bit", 0xD1, 0, 128, 0, LP_OPTIONS}, {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16}, {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16}, diff --git a/drivers/mtd/nand/nand_plat.c b/drivers/mtd/nand/nand_plat.c index b35492b9fc..37a0206ad6 100644 --- a/drivers/mtd/nand/nand_plat.c +++ b/drivers/mtd/nand/nand_plat.c @@ -16,6 +16,10 @@ #include <common.h> #include <asm/io.h> +#ifdef NAND_PLAT_GPIO_DEV_READY +# include <asm/gpio.h> +# define NAND_PLAT_DEV_READY(chip) gpio_get_value(NAND_PLAT_GPIO_DEV_READY) +#endif #include <nand.h> @@ -43,7 +47,14 @@ static int plat_dev_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { +#ifdef NAND_PLAT_GPIO_DEV_READY + gpio_request(NAND_PLAT_GPIO_DEV_READY, "nand-plat"); + gpio_direction_input(NAND_PLAT_GPIO_DEV_READY); +#endif + +#ifdef NAND_PLAT_INIT NAND_PLAT_INIT(); +#endif nand->cmd_ctrl = plat_cmd_ctrl; nand->dev_ready = plat_dev_ready; |
