summaryrefslogtreecommitdiffstats
path: root/board/freescale/mpc8610hpcd
diff options
context:
space:
mode:
Diffstat (limited to 'board/freescale/mpc8610hpcd')
-rw-r--r--board/freescale/mpc8610hpcd/Makefile4
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd.c45
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c105
3 files changed, 150 insertions, 4 deletions
diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile
index 6f5a5c16e3..76087c12a6 100644
--- a/board/freescale/mpc8610hpcd/Makefile
+++ b/board/freescale/mpc8610hpcd/Makefile
@@ -29,7 +29,9 @@ LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o \
../common/sys_eeprom.o \
- ../common/pixis.o
+ ../common/pixis.o \
+ mpc8610hpcd_diu.o \
+ ../common/fsl_diu_fb.o
SOBJS := init.o
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 63790ca9b6..617881ad09 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -54,7 +54,47 @@ int board_early_init_f(void)
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
- gur->gpiocr |= 0x888a5500; /* DIU16, IR1, UART0, UART2 */
+ gur->gpiocr |= 0x88aa5500; /* DIU16, IR1, UART0, UART2 */
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ u8 tmp_val, version;
+
+ /*Do not use 8259PIC*/
+ tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0);
+ out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x80);
+
+ /*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/
+ version = in8(PIXIS_BASE + PIXIS_PVER);
+ if(version >= 0x07) {
+ tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0);
+ out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xbf);
+ }
+
+ /* Using this for DIU init before the driver in linux takes over
+ * Enable the TFP410 Encoder (I2C address 0x38)
+ */
+
+ tmp_val = 0xBF;
+ i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
+ /* Verify if enabled */
+ tmp_val = 0;
+ i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
+ debug("DVI Encoder Read: 0x%02lx\n",tmp_val);
+
+ tmp_val = 0x10;
+ i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
+ /* Verify if enabled */
+ tmp_val = 0;
+ i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
+ debug("DVI Encoder Read: 0x%02lx\n",tmp_val);
+
+#ifdef CONFIG_FSL_DIU_FB
+ mpc8610hpcd_diu_init();
+#endif
return 0;
}
@@ -62,7 +102,6 @@ int board_early_init_f(void)
int checkboard(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *memctl = &immap->im_lbc;
volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
puts("Board: MPC8610HPCD\n");
@@ -468,7 +507,7 @@ ft_board_setup(void *blob, bd_t *bd)
unsigned long
get_board_sys_clk(ulong dummy)
{
- u8 i, go_bit, rd_clks;
+ u8 i;
ulong val = 0;
ulong a;
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
new file mode 100644
index 0000000000..4449376789
--- /dev/null
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * York Sun <yorksun@freescale.com>
+ *
+ * FSL DIU Framebuffer driver
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_FSL_DIU_FB
+
+#include "../common/pixis.h"
+#include "../common/fsl_diu_fb.h"
+
+
+extern unsigned int FSL_Logo_BMP[];
+
+
+void mpc8610hpcd_diu_init(void)
+{
+ char *monitor_port;
+ int xres, gamma_fix;
+ unsigned int pixel_format;
+ unsigned char tmp_val;
+
+ tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0);
+ monitor_port = getenv ("monitor");
+
+ if (!strncmp(monitor_port, "0", 1)) { /* 0 - DVI */
+ xres = 1280;
+ pixel_format = 0x88882317;
+ gamma_fix = 0;
+ out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x08);
+
+ } else if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */
+ xres = 1024;
+ pixel_format = 0x88883316;
+ gamma_fix = 0;
+ out8(PIXIS_BASE + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10);
+
+ } else if (!strncmp(monitor_port, "2", 1)) { /* 2 - Double link LVDS */
+ xres = 1280;
+ pixel_format = 0x88883316;
+ gamma_fix = 1;
+ out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xe7);
+
+ } else { /* DVI */
+ xres = 1280;
+ pixel_format = 0x88882317;
+ gamma_fix = 0;
+ out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x08);
+ }
+
+ fsl_diu_init(xres, pixel_format, gamma_fix,
+ (unsigned char *)FSL_Logo_BMP);
+}
+
+int mpc8610diu_init_show_bmp(cmd_tbl_t *cmdtp,
+ int flag, int argc, char *argv[])
+{
+ unsigned int addr;
+
+ if (argc < 2) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if (!strncmp(argv[1],"init",4)) {
+ mpc8610hpcd_diu_init();
+ } else {
+ addr = simple_strtoul(argv[1], NULL, 16);
+ fsl_diu_clear_screen();
+ fsl_diu_display_bmp((unsigned char *)addr, 0, 0, 0);
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ diufb, CFG_MAXARGS, 1, mpc8610diu_init_show_bmp,
+ "diufb init | addr - Init or Display BMP file\n",
+ "init\n - initialize DIU\n"
+ "addr\n - display bmp at address 'addr'\n"
+ );
+#endif /* CONFIG_FSL_DIU_FB */
OpenPOWER on IntegriCloud