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-rw-r--r--arch/blackfin/lib/board.c6
-rw-r--r--arch/blackfin/lib/clocks.c12
-rw-r--r--arch/blackfin/lib/string.c9
3 files changed, 11 insertions, 16 deletions
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index ccea3b9fb1..f1d55470e8 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -231,6 +231,8 @@ static int global_board_data_init(void)
bd->bi_sclk = get_sclk();
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
+ bd->bi_baudrate = (gd->baudrate > 0)
+ ? simple_strtoul(gd->baudrate, NULL, 10) : CONFIG_BAUDRATE;
return 0;
}
@@ -277,9 +279,9 @@ void board_init_f(ulong bootflag)
dcache_enable();
#endif
-#ifdef CONFIG_WATCHDOG
+#ifdef CONFIG_HW_WATCHDOG
serial_early_puts("Setting up external watchdog\n");
- watchdog_init();
+ hw_watchdog_init();
#endif
#ifdef DEBUG
diff --git a/arch/blackfin/lib/clocks.c b/arch/blackfin/lib/clocks.c
index d852f5ebed..97795e11ac 100644
--- a/arch/blackfin/lib/clocks.c
+++ b/arch/blackfin/lib/clocks.c
@@ -7,17 +7,7 @@
*/
#include <common.h>
-#include <asm/blackfin.h>
-
-#ifdef PLL_CTL
-# include <asm/mach-common/bits/pll.h>
-# define pll_is_bypassed() (bfin_read_PLL_STAT() & DF)
-#else
-# include <asm/mach-common/bits/cgu.h>
-# define pll_is_bypassed() (bfin_read_CGU_STAT() & PLLBP)
-# define bfin_read_PLL_CTL() bfin_read_CGU_CTL()
-# define bfin_read_PLL_DIV() bfin_read_CGU_DIV()
-#endif
+#include <asm/clock.h>
/* Get the voltage input multiplier */
u_long get_vco(void)
diff --git a/arch/blackfin/lib/string.c b/arch/blackfin/lib/string.c
index 44d8c6d906..5b7ac0b91a 100644
--- a/arch/blackfin/lib/string.c
+++ b/arch/blackfin/lib/string.c
@@ -128,10 +128,12 @@ static void dma_calc_size(unsigned long ldst, unsigned long lsrc, size_t count,
unsigned long limit;
#ifdef MSIZE
- limit = 6;
+ /* The max memory DMA memory transfer size is 32 bytes. */
+ limit = 5;
*dshift = MSIZE_P;
#else
- limit = 3;
+ /* The max memory DMA memory transfer size is 4 bytes. */
+ limit = 2;
*dshift = WDSIZE_P;
#endif
@@ -170,7 +172,8 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
mod = 1 << bpos;
#ifdef PSIZE
- dsize |= min(3, bpos) << PSIZE_P;
+ /* The max memory DMA peripheral transfer size is 4 bytes. */
+ dsize |= min(2, bpos) << PSIZE_P;
#endif
/* Copy sram functions from sdram to sram */
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