diff options
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/ddr.c | 11 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/emif4.c | 6 |
2 files changed, 0 insertions, 17 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index 597d62f61b..59ca51f59d 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -101,22 +101,11 @@ void config_cmd_ctrl(const struct cmd_control *cmd) void config_ddr_data(int macrono, const struct ddr_data *data) { writel(data->datardsratio0, &ddr_reg[macrono]->dt0rdsratio0); - writel(data->datardsratio1, &ddr_reg[macrono]->dt0rdsratio1); - writel(data->datawdsratio0, &ddr_reg[macrono]->dt0wdsratio0); - writel(data->datawdsratio1, &ddr_reg[macrono]->dt0wdsratio1); - writel(data->datawiratio0, &ddr_reg[macrono]->dt0wiratio0); - writel(data->datawiratio1, &ddr_reg[macrono]->dt0wiratio1); writel(data->datagiratio0, &ddr_reg[macrono]->dt0giratio0); - writel(data->datagiratio1, &ddr_reg[macrono]->dt0giratio1); - writel(data->datafwsratio0, &ddr_reg[macrono]->dt0fwsratio0); - writel(data->datafwsratio1, &ddr_reg[macrono]->dt0fwsratio1); - writel(data->datawrsratio0, &ddr_reg[macrono]->dt0wrsratio0); - writel(data->datawrsratio1, &ddr_reg[macrono]->dt0wrsratio1); - writel(data->datadldiff0, &ddr_reg[macrono]->dt0dldiff0); } diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c index 3219045447..ace3d26eac 100644 --- a/arch/arm/cpu/armv7/am33xx/emif4.c +++ b/arch/arm/cpu/armv7/am33xx/emif4.c @@ -51,22 +51,16 @@ void dram_init_banksize(void) static const struct ddr_data ddr2_data = { .datardsratio0 = ((DDR2_RD_DQS<<30)|(DDR2_RD_DQS<<20) |(DDR2_RD_DQS<<10)|(DDR2_RD_DQS<<0)), - .datardsratio1 = DDR2_RD_DQS>>2, .datawdsratio0 = ((DDR2_WR_DQS<<30)|(DDR2_WR_DQS<<20) |(DDR2_WR_DQS<<10)|(DDR2_WR_DQS<<0)), - .datawdsratio1 = DDR2_WR_DQS>>2, .datawiratio0 = ((DDR2_PHY_WRLVL<<30)|(DDR2_PHY_WRLVL<<20) |(DDR2_PHY_WRLVL<<10)|(DDR2_PHY_WRLVL<<0)), - .datawiratio1 = DDR2_PHY_WRLVL>>2, .datagiratio0 = ((DDR2_PHY_GATELVL<<30)|(DDR2_PHY_GATELVL<<20) |(DDR2_PHY_GATELVL<<10)|(DDR2_PHY_GATELVL<<0)), - .datagiratio1 = DDR2_PHY_GATELVL>>2, .datafwsratio0 = ((DDR2_PHY_FIFO_WE<<30)|(DDR2_PHY_FIFO_WE<<20) |(DDR2_PHY_FIFO_WE<<10)|(DDR2_PHY_FIFO_WE<<0)), - .datafwsratio1 = DDR2_PHY_FIFO_WE>>2, .datawrsratio0 = ((DDR2_PHY_WR_DATA<<30)|(DDR2_PHY_WR_DATA<<20) |(DDR2_PHY_WR_DATA<<10)|(DDR2_PHY_WR_DATA<<0)), - .datawrsratio1 = DDR2_PHY_WR_DATA>>2, .datadldiff0 = PHY_DLL_LOCK_DIFF, }; |
