summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/cpu/armv7/omap5/hwinit.c3
-rw-r--r--arch/arm/include/asm/arch-omap5/omap.h1
-rw-r--r--arch/arm/include/asm/omap_common.h1
3 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index 93feb1623c..a8a474a88b 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -336,6 +336,9 @@ void init_omap_revision(void)
case DRA752_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = DRA752_ES1_1;
break;
+ case DRA722_CONTROL_ID_CODE_ES1_0:
+ *omap_si_rev = DRA722_ES1_0;
+ break;
default:
*omap_si_rev = OMAP5430_SILICON_ID_INVALID;
}
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index a82a7b2bed..ce13ca93bb 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -45,6 +45,7 @@
#define OMAP5432_CONTROL_ID_CODE_ES2_0 0x1B99802F
#define DRA752_CONTROL_ID_CODE_ES1_0 0x0B99002F
#define DRA752_CONTROL_ID_CODE_ES1_1 0x1B99002F
+#define DRA722_CONTROL_ID_CODE_ES1_0 0x0B9BC02F
/* UART */
#define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000)
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 729723afef..d1dd4b5368 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -645,6 +645,7 @@ static inline u8 is_dra7xx(void)
/* DRA7XX */
#define DRA752_ES1_0 0x07520100
#define DRA752_ES1_1 0x07520110
+#define DRA722_ES1_0 0x07220100
/*
* SRAM scratch space entries
OpenPOWER on IntegriCloud