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-rw-r--r--arch/arm/cpu/arm1136/start.S10
-rw-r--r--arch/arm/lib/cache.c13
2 files changed, 10 insertions, 13 deletions
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 3e2358e132..0085754ebe 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -333,14 +333,4 @@ fiq:
bl do_fiq
#endif
- .align 5
-.global arm1136_cache_flush
-arm1136_cache_flush:
-#if !defined(CONFIG_SYS_ICACHE_OFF)
- mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
-#endif
-#if !defined(CONFIG_SYS_DCACHE_OFF)
- mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
-#endif
- mov pc, lr @ back to caller
#endif /* CONFIG_SPL_BUILD */
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 6cc136aa3c..4f6b9f01cb 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -12,16 +12,23 @@
void __flush_cache(unsigned long start, unsigned long size)
{
#if defined(CONFIG_ARM1136)
- void arm1136_cache_flush(void);
- arm1136_cache_flush();
+#if !defined(CONFIG_SYS_ICACHE_OFF)
+ asm("mcr p15, 0, r1, c7, c5, 0"); /* invalidate I cache */
#endif
+
+#if !defined(CONFIG_SYS_DCACHE_OFF)
+ asm("mcr p15, 0, r1, c7, c14, 0"); /* Clean+invalidate D cache */
+#endif
+
+#endif /* CONFIG_ARM1136 */
+
#ifdef CONFIG_ARM926EJS
/* test and clean, page 2-23 of arm926ejs manual */
asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
/* disable write buffer as well (page 2-22) */
asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
-#endif
+#endif /* CONFIG_ARM926EJS */
return;
}
void flush_cache(unsigned long start, unsigned long size)
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