diff options
| -rw-r--r-- | arch/arm/cpu/armv7/socfpga/misc.c | 17 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h | 2 | ||||
| -rw-r--r-- | board/altera/socfpga/socfpga_cyclone5.c | 9 | ||||
| -rw-r--r-- | include/configs/socfpga_cyclone5.h | 32 |
4 files changed, 51 insertions, 9 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c index 5268f2c708..ecae393410 100644 --- a/arch/arm/cpu/armv7/socfpga/misc.c +++ b/arch/arm/cpu/armv7/socfpga/misc.c @@ -6,6 +6,8 @@ #include <common.h> #include <asm/io.h> +#include <miiphy.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -38,3 +40,18 @@ int misc_init_r(void) { return 0; } + + +/* + * DesignWare Ethernet initialization + */ +int cpu_eth_init(bd_t *bis) +{ +#if !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) && !defined(CONFIG_SPL_BUILD) + /* initialize and register the emac */ + return designware_initialize(CONFIG_EMAC_BASE, + CONFIG_PHY_INTERFACE_MODE); +#else + return 0; +#endif +} diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h index 5f738240f1..2d3152da90 100644 --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h @@ -16,5 +16,7 @@ #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 #define SOCFPGA_SCANMGR_ADDRESS 0xfff02000 +#define SOCFPGA_EMAC0_ADDRESS 0xff700000 +#define SOCFPGA_EMAC1_ADDRESS 0xff702000 #endif /* _SOCFPGA_BASE_ADDRS_H_ */ diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c index f36656505f..fb92852d5f 100644 --- a/board/altera/socfpga/socfpga_cyclone5.c +++ b/board/altera/socfpga/socfpga_cyclone5.c @@ -37,12 +37,3 @@ int board_init(void) icache_enable(); return 0; } - -/* - * DesignWare Ethernet initialization - */ -/* We know all the init functions have been run now */ -int board_eth_init(bd_t *bis) -{ - return 0; -} diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index e02b50a4a8..5d145cd821 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -208,6 +208,38 @@ #define CONFIG_ENV_IS_NOWHERE /* + * network support + */ +#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET +#define CONFIG_DESIGNWARE_ETH 1 +#endif + +#ifdef CONFIG_DESIGNWARE_ETH +#define CONFIG_EMAC0_BASE SOCFPGA_EMAC0_ADDRESS +#define CONFIG_EMAC1_BASE SOCFPGA_EMAC1_ADDRESS +/* console support for network */ +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +/* designware */ +#define CONFIG_NET_MULTI +#define CONFIG_DW_ALTDESCRIPTOR +#define CONFIG_DW_SEARCH_PHY +#define CONFIG_MII +#define CONFIG_PHY_GIGE +#define CONFIG_DW_AUTONEG +#define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ) +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 +/* EMAC controller and PHY used */ +#define CONFIG_EMAC_BASE CONFIG_EMAC1_BASE +#define CONFIG_EPHY_PHY_ADDR CONFIG_EPHY1_PHY_ADDR +#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII +#endif /* CONFIG_DESIGNWARE_ETH */ + +/* * L4 Watchdog */ #define CONFIG_HW_WATCHDOG |
