diff options
| -rw-r--r-- | CHANGELOG | 9 | ||||
| -rw-r--r-- | board/amcc/bamboo/bamboo.c | 11 | ||||
| -rw-r--r-- | board/amcc/ebony/ebony.c | 8 | ||||
| -rw-r--r-- | board/amcc/ocotea/ocotea.c | 8 | ||||
| -rw-r--r-- | board/amcc/yellowstone/yellowstone.c | 12 | ||||
| -rw-r--r-- | board/amcc/yosemite/yosemite.c | 12 | ||||
| -rw-r--r-- | board/prodrive/p3p440/p3p440.c | 11 | ||||
| -rw-r--r-- | board/sandburst/karef/karef.c | 6 | ||||
| -rw-r--r-- | board/sandburst/metrobox/metrobox.c | 7 | ||||
| -rw-r--r-- | board/xpedite1k/xpedite1k.c | 8 | ||||
| -rw-r--r-- | cpu/ppc4xx/cpu.c | 233 | ||||
| -rw-r--r-- | include/configs/bamboo.h | 2 |
12 files changed, 144 insertions, 183 deletions
@@ -2,6 +2,15 @@ Changes for U-Boot 1.1.4: ====================================================================== +* Changed PPC44x startup message (cpu info, speed...) to common style: + On PPC44x platforms, the startup message generated in "cpu.c" only + comprised the ppc type and revision but not additional informations + like speed etc. Those speed infos where printed in the board specific + code. This new implementation now prints all CPU infos in the common + cpu specific code. No board specific code is needed anymore and + therefore removed from all current 44x implementations. + Patch by Stefan Roese, 27 Nov 2005 + * Remove unnnecessary #include <linux/types.h> from include/asm-*/u-boot.h * Allow use of include/image.h and include/asm-*/u-boot.h in proprietary code. diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c index 53bf735008..17547671a7 100644 --- a/board/amcc/bamboo/bamboo.c +++ b/board/amcc/bamboo/bamboo.c @@ -359,10 +359,7 @@ void nand_init(void) int checkboard(void) { - sys_info_t sysinfo; - unsigned char *s = getenv("serial#"); - - get_sys_info(&sysinfo); + char *s = getenv("serial#"); printf("Board: Bamboo - AMCC PPC440EP Evaluation Board"); if (s != NULL) { @@ -371,12 +368,6 @@ int checkboard(void) } putc('\n'); - printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); - return (0); } diff --git a/board/amcc/ebony/ebony.c b/board/amcc/ebony/ebony.c index 9191f0f60f..a2595eec52 100644 --- a/board/amcc/ebony/ebony.c +++ b/board/amcc/ebony/ebony.c @@ -90,11 +90,8 @@ int board_early_init_f(void) int checkboard(void) { - sys_info_t sysinfo; char *s = getenv("serial#"); - get_sys_info(&sysinfo); - printf("Board: Ebony - AMCC PPC440GP Evaluation Board"); if (s != NULL) { puts(", serial# "); @@ -102,11 +99,6 @@ int checkboard(void) } putc('\n'); - printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); return (0); } diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c index 3926109bd5..d1a29c52a5 100644 --- a/board/amcc/ocotea/ocotea.c +++ b/board/amcc/ocotea/ocotea.c @@ -186,11 +186,8 @@ int board_early_init_f (void) int checkboard (void) { - sys_info_t sysinfo; char *s = getenv ("serial#"); - get_sys_info (&sysinfo); - printf ("Board: Ocotea - AMCC PPC440GX Evaluation Board"); if (s != NULL) { puts (", serial# "); @@ -198,11 +195,6 @@ int checkboard (void) } putc ('\n'); - printf ("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf ("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf ("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf ("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); return (0); } diff --git a/board/amcc/yellowstone/yellowstone.c b/board/amcc/yellowstone/yellowstone.c index 069e28f3c8..f3c689c114 100644 --- a/board/amcc/yellowstone/yellowstone.c +++ b/board/amcc/yellowstone/yellowstone.c @@ -188,10 +188,7 @@ int misc_init_r (void) int checkboard(void) { - sys_info_t sysinfo; - unsigned char *s = getenv("serial#"); - - get_sys_info(&sysinfo); + char *s = getenv("serial#"); printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board"); if (s != NULL) { @@ -200,13 +197,6 @@ int checkboard(void) } putc('\n'); - printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); - printf("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000); - return (0); } diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 61a39beed7..a5cf8b6c81 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -184,10 +184,7 @@ int misc_init_r (void) int checkboard(void) { - sys_info_t sysinfo; - unsigned char *s = getenv("serial#"); - - get_sys_info(&sysinfo); + char *s = getenv("serial#"); printf("Board: Yosemite - AMCC PPC440EP Evaluation Board"); if (s != NULL) { @@ -196,13 +193,6 @@ int checkboard(void) } putc('\n'); - printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); - printf("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000); - return (0); } diff --git a/board/prodrive/p3p440/p3p440.c b/board/prodrive/p3p440/p3p440.c index cc4c9dda99..8ba66bf5e5 100644 --- a/board/prodrive/p3p440/p3p440.c +++ b/board/prodrive/p3p440/p3p440.c @@ -120,11 +120,7 @@ int board_early_init_f(void) int checkboard(void) { - sys_info_t sysinfo; char *s = getenv("serial#"); - char buf[32]; - - get_sys_info(&sysinfo); printf("Board: P3P440"); if (s != NULL) { @@ -140,13 +136,6 @@ int checkboard(void) putc('\n'); - printf(" at %s MHz (VCO=%lu, PLB=%lu, OPB=%lu, EBC=%lu MHz)\n", - strmhz(buf, sysinfo.freqProcessor), - sysinfo.freqVCOMhz / 1000000, - sysinfo.freqPLB / 1000000, - sysinfo.freqOPB / 1000000, - sysinfo.freqEPB / 1000000); - return (0); } diff --git a/board/sandburst/karef/karef.c b/board/sandburst/karef/karef.c index cfbfa47e9d..2d71d3b2cc 100644 --- a/board/sandburst/karef/karef.c +++ b/board/sandburst/karef/karef.c @@ -305,12 +305,6 @@ int checkboard (void) printf("OFEM Board Rev:\t0x%02X\tID: 0x%02X\n", ofem_brd_id, ofem_brd_rev); } - printf ("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf ("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf ("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf ("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); - /* Fix the ack in the bme 32 */ udelay(5000); out32(CFG_BME32_BASE + 0x0000000C, 0x00000001); diff --git a/board/sandburst/metrobox/metrobox.c b/board/sandburst/metrobox/metrobox.c index 869367daba..86d259fac4 100644 --- a/board/sandburst/metrobox/metrobox.c +++ b/board/sandburst/metrobox/metrobox.c @@ -272,13 +272,6 @@ int checkboard (void) printf ("OptoFPGA ID:\t0x%02X\tRev: 0x%02X\n", opto_id, opto_rev); printf ("Board Rev:\t0x%02X\tID: %s\n", brd_rev, board_id_as[brd_id]); - printf ("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf ("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf ("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf ("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); - - /* Fix the ack in the bme 32 */ udelay(5000); out32(CFG_BME32_BASE + 0x0000000C, 0x00000001); diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c index d6b30b9446..bb36c96523 100644 --- a/board/xpedite1k/xpedite1k.c +++ b/board/xpedite1k/xpedite1k.c @@ -96,15 +96,7 @@ int board_early_init_f(void) int checkboard (void) { - sys_info_t sysinfo; - get_sys_info (&sysinfo); - printf ("Board: XES XPedite1000 440GX\n"); - printf ("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf ("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf ("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf ("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); return (0); } diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index d721e46b5b..6c619530f4 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -38,122 +38,114 @@ #include <ppc4xx.h> +#if defined(CONFIG_405GP) +#define PCI_ARBITER_ENABLED (mfdcr(strap) & PSR_PCI_ARBIT_EN) +#define PCI_ASYNC_ENABLED (mfdcr(strap) & PSR_PCI_ASYNC_EN) +#endif + +#if defined(CONFIG_405EP) +#define PCI_ARBITER_ENABLED (mfdcr(cpc0_pci) & CPC0_PCI_ARBIT_EN) +#define I2C_BOOTROM_ENABLED (mfdcr(cpc0_boot) & CPC0_BOOT_SEP) +#endif + +#if defined(CONFIG_440EP) || defined(CONFIG_440GR) +#define SDR0_SDSTP1_PAE (0x80000000 >> 21) +#define SDR0_SDSTP1_PAME (0x80000000 >> 27) + +#define PCI_ARBITER_ENABLED (mfdcr(cpc0_strp1) & SDR0_SDSTP1_PAE) +#define PCI_ASYNC_ENABLED (mfdcr(cpc0_strp1) & SDR0_SDSTP1_PAME) +#endif + +#if defined(CONFIG_440GP) +#define CPC0_STRP1_PAE (0x80000000 >> 11) + +#define PCI_ARBITER_ENABLED (mfdcr(cpc0_strp1) & CPC0_STRP1_PAE) +#endif + +#if defined(CONFIG_440GX) +#define SDR0_SDSTP1_PAE (0x80000000 >> 13) + +#define PCI_ARBITER_ENABLED (mfdcr(cpc0_strp1) & SDR0_SDSTP1_PAE) +#endif + +#if defined(CONFIG_440) +#define FREQ_EBC (sys_info.freqEPB) +#else +#define FREQ_EBC (sys_info.freqPLB / sys_info.pllExtBusDiv) +#endif + + #if defined(CONFIG_440) -static int do_chip_reset( unsigned long sys0, unsigned long sys1 ); +static int do_chip_reset(unsigned long sys0, unsigned long sys1); #endif -/* ------------------------------------------------------------------------- */ int checkcpu (void) { -#if defined(CONFIG_405GP) || \ - defined(CONFIG_405CR) || \ - defined(CONFIG_405EP) || \ - defined(CONFIG_440) || \ - defined(CONFIG_IOP480) - uint pvr = get_pvr(); -#endif -#if defined(CONFIG_405GP) || \ - defined(CONFIG_405CR) || \ - defined(CONFIG_405EP) || \ - defined(CONFIG_IOP480) +#if !defined(CONFIG_405) /* not used on Xilinx 405 FPGA implementations */ DECLARE_GLOBAL_DATA_PTR; - + uint pvr = get_pvr(); ulong clock = gd->cpu_clk; char buf[32]; -#endif -#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_405EP) - PPC405_SYS_INFO sys_info; +#if !defined(CONFIG_IOP480) + sys_info_t sys_info; puts ("CPU: "); get_sys_info(&sys_info); -#ifdef CONFIG_405GP - puts ("AMCC PowerPC 405GP"); - if (pvr == PVR_405GPR_RB) { - putc('r'); - } - puts (" Rev. "); -#endif -#ifdef CONFIG_405CR - puts ("AMCC PowerPC 405CR Rev. "); + puts("AMCC PowerPC 4"); + +#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_405EP) + puts("05"); #endif -#ifdef CONFIG_405EP - puts ("AMCC PowerPC 405EP Rev. "); +#if defined(CONFIG_440) + puts("40"); #endif + switch (pvr) { case PVR_405GP_RB: - case PVR_405GPR_RB: - putc('B'); + puts("GP Rev. B"); break; + case PVR_405GP_RC: -#ifdef CONFIG_405CR - case PVR_405CR_RC: -#endif - putc('C'); + puts("GP Rev. C"); break; + case PVR_405GP_RD: - putc('D'); + puts("GP Rev. D"); break; + #ifdef CONFIG_405GP - case PVR_405GP_RE: - putc('E'); + case PVR_405GP_RE: /* 405GP rev E and 405CR rev C have same PVR */ + puts("GP Rev. E"); break; #endif + case PVR_405CR_RA: - putc('A'); + puts("CR Rev. A"); break; + case PVR_405CR_RB: - case PVR_405EP_RB: - putc('B'); - break; - default: - printf ("? (PVR=%08x)", pvr); + puts("CR Rev. B"); break; - } - - printf (" at %s MHz (PLB=%lu, OPB=%lu, EBC=%lu MHz)\n", strmhz(buf, clock), - sys_info.freqPLB / 1000000, - sys_info.freqPLB / sys_info.pllOpbDiv / 1000000, - sys_info.freqPLB / sys_info.pllExtBusDiv / 1000000); -#if defined(CONFIG_405GP) - if (mfdcr(strap) & PSR_PCI_ASYNC_EN) { - printf (" PCI async ext clock used, "); - } else { - printf (" PCI sync clock at %lu MHz, ", - sys_info.freqPLB / sys_info.pllPciDiv / 1000000); - } - printf ("%sternal PCI arbiter enabled\n", - (mfdcr(strap) & PSR_PCI_ARBIT_EN) ? "in" : "ex"); -#elif defined(CONFIG_405EP) - printf (" IIC Boot EEPROM %sabled\n", - (mfdcr(cpc0_boot) & CPC0_BOOT_SEP) ? "en" : "dis"); - printf (" PCI async ext clock used, "); - printf ("%sternal PCI arbiter enabled\n", - (mfdcr(cpc0_pci) & CPC0_PCI_ARBIT_EN) ? "in" : "ex"); +#ifdef CONFIG_405CR + case PVR_405CR_RC: /* 405GP rev E and 405CR rev C have same PVR */ + puts("CR Rev. C"); + break; #endif -#if defined(CONFIG_405EP) - printf (" 16 kB I-Cache 16 kB D-Cache"); -#else - printf (" 16 kB I-Cache %d kB D-Cache", - ((pvr | 0x00000001) == PVR_405GPR_RB) ? 16 : 8); -#endif -#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */ + case PVR_405GPR_RB: + puts("GPr Rev. B"); + break; -#ifdef CONFIG_IOP480 - printf ("PLX IOP480 (PVR=%08x)", pvr); - printf (" at %s MHz:", strmhz(buf, clock)); - printf (" %u kB I-Cache", 4); - printf (" %u kB D-Cache", 2); -#endif + case PVR_405EP_RB: + puts("EP Rev. B"); + break; #if defined(CONFIG_440) - puts ("AMCC PowerPC 440"); - switch(pvr) { case PVR_440GP_RB: puts("GP Rev. B"); /* See errata 1.12: CHIP_4 */ @@ -166,40 +158,96 @@ int checkcpu (void) mfdcr(cpc0_strp1) ); } break; + case PVR_440GP_RC: puts("GP Rev. C"); break; + case PVR_440GX_RA: puts("GX Rev. A"); break; + case PVR_440GX_RB: puts("GX Rev. B"); break; + case PVR_440GX_RC: puts("GX Rev. C"); break; + case PVR_440GX_RF: puts("GX Rev. F"); break; + case PVR_440EP_RA: puts("EP Rev. A"); break; + #ifdef CONFIG_440EP case PVR_440EP_RB: /* 440EP rev B and 440GR rev A have same PVR */ puts("EP Rev. B"); break; #endif /* CONFIG_440EP */ + #ifdef CONFIG_440GR case PVR_440GR_RA: /* 440EP rev B and 440GR rev A have same PVR */ puts("GR Rev. A"); break; #endif /* CONFIG_440GR */ +#endif /* CONFIG_440 */ + default: printf (" UNKNOWN (PVR=%08x)", pvr); break; } + + printf (" at %s MHz (PLB=%lu, OPB=%lu, EBC=%lu MHz)\n", strmhz(buf, clock), + sys_info.freqPLB / 1000000, + sys_info.freqPLB / sys_info.pllOpbDiv / 1000000, + FREQ_EBC / 1000000); + +#if defined(I2C_BOOTROM_ENABLED) + printf (" IIC Boot EEPROM %sabled\n", I2C_BOOTROM_ENABLED ? "en" : "dis"); +#endif + +#if defined(PCI_ARBITER_ENABLED) + printf (" %sternal PCI arbiter enabled", + (PCI_ARBITER_ENABLED) ? "In" : "Ex"); +#endif + +#if defined(PCI_ASYNC_ENABLED) + if (PCI_ASYNC_ENABLED) { + printf (", PCI async ext clock used"); + } else { + printf (", PCI sync clock at %lu MHz", + sys_info.freqPLB / sys_info.pllPciDiv / 1000000); + } #endif - puts ("\n"); + +#if defined(PCI_ARBITER_ENABLED) || defined(PCI_ASYNC_ENABLED) + putc('\n'); +#endif + +#if defined(CONFIG_405EP) + printf (" 16 kB I-Cache 16 kB D-Cache"); +#elif defined(CONFIG_440) + printf (" 32 kB I-Cache 32 kB D-Cache"); +#else + printf (" 16 kB I-Cache %d kB D-Cache", + ((pvr | 0x00000001) == PVR_405GPR_RB) ? 16 : 8); +#endif +#endif /* !defined(CONFIG_IOP480) */ + +#if defined(CONFIG_IOP480) + printf ("PLX IOP480 (PVR=%08x)", pvr); + printf (" at %s MHz:", strmhz(buf, clock)); + printf (" %u kB I-Cache", 4); + printf (" %u kB D-Cache", 2); +#endif + +#endif /* !defined(CONFIG_405) */ + + putc ('\n'); return 0; } @@ -230,8 +278,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } #if defined(CONFIG_440) -static -int do_chip_reset (unsigned long sys0, unsigned long sys1) +static int do_chip_reset (unsigned long sys0, unsigned long sys1) { /* Changes to cpc0_sys0 and cpc0_sys1 require chip * reset. @@ -252,31 +299,13 @@ int do_chip_reset (unsigned long sys0, unsigned long sys1) */ unsigned long get_tbclk (void) { -#if defined(CONFIG_440) - +#if !defined(CONFIG_IOP480) sys_info_t sys_info; get_sys_info(&sys_info); return (sys_info.freqProcessor); - -#elif defined(CONFIG_405GP) || \ - defined(CONFIG_405CR) || \ - defined(CONFIG_405) || \ - defined(CONFIG_405EP) - - PPC405_SYS_INFO sys_info; - - get_sys_info(&sys_info); - return (sys_info.freqProcessor); - -#elif defined(CONFIG_IOP480) - - return (66000000); - #else - -# error get_tbclk() not implemented - + return (66000000); #endif } diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index ab8a1e78f1..eacc74446c 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -73,7 +73,7 @@ * Initial RAM & stack pointer (placed in SDRAM) *----------------------------------------------------------------------*/ #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */ -#define CFG_INIT_RAM_END (8 << 10) +#define CFG_INIT_RAM_END (4 << 10) #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
