diff options
| -rw-r--r-- | configs/socfpga_socrates_defconfig | 3 | ||||
| -rw-r--r-- | include/configs/socfpga_common.h | 7 |
2 files changed, 3 insertions, 7 deletions
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 0f3896d5f0..888bbb6c6f 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -3,3 +3,6 @@ CONFIG_SPL=y +S:CONFIG_TARGET_SOCFPGA_CYCLONE5=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" +CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 6b1f967c44..ee227fef0f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -190,10 +190,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); * QSPI support */ #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ -#define CONFIG_CMD_DM -#define CONFIG_DM -#define CONFIG_DM_SPI -#define CONFIG_DM_SPI_FLASH #define CONFIG_CADENCE_QSPI /* Enable multiple SPI NOR flash manufacturers */ #define CONFIG_SPI_FLASH /* SPI flash subsystem */ @@ -210,9 +206,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */ -#define CONFIG_CMD_DM -#define CONFIG_DM -#define CONFIG_DM_SPI #define CONFIG_DESIGNWARE_SPI #define CONFIG_CMD_SPI #endif |
