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authorTom Rini <trini@ti.com>2015-01-26 17:44:49 -0500
committerTom Rini <trini@ti.com>2015-01-26 17:44:49 -0500
commitab92da9f47d51d363c7de42e2a7bd807e2c1bd54 (patch)
treedfabc29929e39a1ecc47edf5a4cf839ead062acd /include
parentaed03faa064cca56847571b13cbd4c849c6116aa (diff)
parente43ade3749ff10bc313f33bf23705465e4163896 (diff)
downloadblackbird-obmc-uboot-ab92da9f47d51d363c7de42e2a7bd807e2c1bd54.tar.gz
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Merge branch 'master' of git://git.denx.de/u-boot-x86
Diffstat (limited to 'include')
-rw-r--r--include/configs/chromebook_link.h8
-rw-r--r--include/configs/x86-common.h2
-rw-r--r--include/fdtdec.h1
-rw-r--r--include/net.h30
-rw-r--r--include/pci.h9
-rw-r--r--include/pci_rom.h1
-rw-r--r--include/rtc.h32
-rw-r--r--include/vbe.h9
8 files changed, 89 insertions, 3 deletions
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 7e6d239d13..7b460e83c4 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -20,6 +20,7 @@
#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MISC_INIT_R
#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_X86_MRC_ADDR 0xfffa0000
@@ -63,6 +64,13 @@
#define CONFIG_CMD_CROS_EC
#define CONFIG_ARCH_EARLY_INIT_R
+#undef CONFIG_ENV_IS_NOWHERE
+#undef CONFIG_ENV_SIZE
+#define CONFIG_ENV_SIZE 0x1000
+#define CONFIG_ENV_SECT_SIZE 0x1000
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET 0x003f8000
+
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
"stdout=vga,serial\0" \
"stderr=vga,serial\0"
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index f16ae32913..ecedfc3ab1 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -179,6 +179,7 @@
#define VIDEO_FB_16BPP_WORD_SWAP
#define CONFIG_I8042_KBD
#define CONFIG_CFB_CONSOLE
+#define CONFIG_CONSOLE_SCROLL_LINES 5
/*-----------------------------------------------------------------------
* CPU Features
@@ -210,6 +211,7 @@
#define CONFIG_CMD_SF_TEST
#define CONFIG_CMD_SPI
#define CONFIG_SPI
+#define CONFIG_OF_SPI_FLASH
/*-----------------------------------------------------------------------
* Environment configuration
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 75af750ee5..8c2bd21b2d 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -173,6 +173,7 @@ enum fdt_compat_id {
COMPAT_INTEL_MODEL_206AX, /* Intel Model 206AX CPU */
COMPAT_INTEL_GMA, /* Intel Graphics Media Accelerator */
COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */
+ COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */
COMPAT_COUNT,
};
diff --git a/include/net.h b/include/net.h
index 3da35fe981..73ea88b42d 100644
--- a/include/net.h
+++ b/include/net.h
@@ -482,6 +482,36 @@ extern void net_set_ip_header(uchar *pkt, IPaddr_t dest, IPaddr_t source);
extern void net_set_udp_header(uchar *pkt, IPaddr_t dest, int dport,
int sport, int len);
+/**
+ * compute_ip_checksum() - Compute IP checksum
+ *
+ * @addr: Address to check (must be 16-bit aligned)
+ * @nbytes: Number of bytes to check (normally a multiple of 2)
+ * @return 16-bit IP checksum
+ */
+unsigned compute_ip_checksum(const void *addr, unsigned nbytes);
+
+/**
+ * add_ip_checksums() - add two IP checksums
+ *
+ * @offset: Offset of first sum (if odd we do a byte-swap)
+ * @sum: First checksum
+ * @new_sum: New checksum to add
+ * @return updated 16-bit IP checksum
+ */
+unsigned add_ip_checksums(unsigned offset, unsigned sum, unsigned new_sum);
+
+/**
+ * ip_checksum_ok() - check if a checksum is correct
+ *
+ * This works by making sure the checksum sums to 0
+ *
+ * @addr: Address to check (must be 16-bit aligned)
+ * @nbytes: Number of bytes to check (normally a multiple of 2)
+ * @return true if the checksum matches, false if not
+ */
+int ip_checksum_ok(const void *addr, unsigned nbytes);
+
/* Checksum */
extern int NetCksumOk(uchar *, int); /* Return true if cksum OK */
extern uint NetCksum(uchar *, int); /* Calculate the checksum */
diff --git a/include/pci.h b/include/pci.h
index 7f67ca6542..4fbb8f6729 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -697,5 +697,14 @@ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
* */
u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum);
+/**
+ * pciauto_setup_rom() - Set up access to a device ROM
+ *
+ * @hose: PCI hose to use
+ * @dev: PCI device to adjust
+ * @return 0 if done, -ve on error
+ */
+int pciauto_setup_rom(struct pci_controller *hose, pci_dev_t dev);
+
#endif /* __ASSEMBLY__ */
#endif /* _PCI_H */
diff --git a/include/pci_rom.h b/include/pci_rom.h
index 8b2674cf87..4ba36eb1b7 100644
--- a/include/pci_rom.h
+++ b/include/pci_rom.h
@@ -8,7 +8,6 @@
#define _PCI_ROM_H
#define PCI_ROM_HDR 0xaa55
-#define PCI_VGA_RAM_IMAGE_START 0xc0000
struct pci_rom_header {
uint16_t signature;
diff --git a/include/rtc.h b/include/rtc.h
index d11aa8baf9..54e361ea5e 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -51,6 +51,38 @@ unsigned long mktime (unsigned int, unsigned int, unsigned int,
unsigned int, unsigned int, unsigned int);
/**
+ * rtc_read8() - Read an 8-bit register
+ *
+ * @reg: Register to read
+ * @return value read
+ */
+int rtc_read8(int reg);
+
+/**
+ * rtc_write8() - Write an 8-bit register
+ *
+ * @reg: Register to write
+ * @value: Value to write
+ */
+void rtc_write8(int reg, uchar val);
+
+/**
+ * rtc_read32() - Read a 32-bit value from the RTC
+ *
+ * @reg: Offset to start reading from
+ * @return value read
+ */
+u32 rtc_read32(int reg);
+
+/**
+ * rtc_write32() - Write a 32-bit value to the RTC
+ *
+ * @reg: Register to start writing to
+ * @value: Value to write
+ */
+void rtc_write32(int reg, u32 value);
+
+/**
* rtc_init() - Set up the real time clock ready for use
*/
void rtc_init(void);
diff --git a/include/vbe.h b/include/vbe.h
index d4056914c4..c5deee9eca 100644
--- a/include/vbe.h
+++ b/include/vbe.h
@@ -35,10 +35,14 @@ struct __packed screen_info_input {
struct __packed vbe_info {
char signature[4];
u16 version;
- u8 *oem_string_ptr;
+ u32 oem_string_ptr;
u32 capabilities;
- u16 video_mode_list[256];
+ u32 modes_ptr;
u16 total_memory;
+ u16 oem_version;
+ u32 vendor_name_ptr;
+ u32 product_name_ptr;
+ u32 product_rev_ptr;
};
struct __packed vesa_mode_info {
@@ -96,6 +100,7 @@ struct vbe_ddc_info {
#define VESA_GET_INFO 0x4f00
#define VESA_GET_MODE_INFO 0x4f01
#define VESA_SET_MODE 0x4f02
+#define VESA_GET_CUR_MODE 0x4f03
struct graphic_device;
int vbe_get_video_info(struct graphic_device *gdev);
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