Merge remote branch 'u-boot-avr32/master'

12 files changed, 477 insertions, 284 deletions

diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h
index 385319aac7..4a1dd33b56 100644
--- a/include/asm-avr32/arch-at32ap700x/clk.h
+++ b/include/asm-avr32/arch-at32ap700x/clk.h
@@ -58,7 +58,7 @@ static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
 	return get_pba_clk_rate();
 }
 #endif
-#ifdef AT32AP700x_CHIP_HAS_USART
+#ifdef AT32AP700x_CHIP_HAS_MACB
 static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
 {
 	return get_pbb_clk_rate();
@@ -75,6 +75,8 @@ static inline unsigned long get_mci_clk_rate(void)
 }
 #endif
 
+extern void clk_init(void);
+
 /* Board code may need the SDRAM base clock as a compile-time constant */
 #define SDRAMC_BUS_HZ	(MAIN_CLK_RATE >> CFG_CLKDIV_HSB)
 
diff --git a/include/asm-avr32/arch-at32ap700x/hmatrix.h b/include/asm-avr32/arch-at32ap700x/hmatrix.h
new file mode 100644
index 0000000000..d6b626328d
--- /dev/null
+++ b/include/asm-avr32/arch-at32ap700x/hmatrix.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2008 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_AVR32_ARCH_HMATRIX_H__
+#define __ASM_AVR32_ARCH_HMATRIX_H__
+
+#include <asm/hmatrix-common.h>
+
+/* Bitfields in SFR4 (EBI) */
+#define HMATRIX_EBI_SDRAM_ENABLE_OFFSET		1
+#define HMATRIX_EBI_SDRAM_ENABLE_SIZE		1
+#define HMATRIX_EBI_NAND_ENABLE_OFFSET		3
+#define HMATRIX_EBI_NAND_ENABLE_SIZE		1
+#define HMATRIX_EBI_CF0_ENABLE_OFFSET		4
+#define HMATRIX_EBI_CF0_ENABLE_SIZE		1
+#define HMATRIX_EBI_CF1_ENABLE_OFFSET		5
+#define HMATRIX_EBI_CF1_ENABLE_SIZE		1
+#define HMATRIX_EBI_PULLUP_DISABLE_OFFSET	8
+#define HMATRIX_EBI_PULLUP_DISABLE_SIZE		1
+
+/* HSB masters */
+#define HMATRIX_MASTER_CPU_DCACHE		0
+#define HMATRIX_MASTER_CPU_ICACHE		1
+#define HMATRIX_MASTER_PDC			2
+#define HMATRIX_MASTER_ISI			3
+#define HMATRIX_MASTER_USBA			4
+#define HMATRIX_MASTER_LCDC			5
+#define HMATRIX_MASTER_MACB0			6
+#define HMATRIX_MASTER_MACB1			7
+#define HMATRIX_MASTER_DMACA_M0			8
+#define HMATRIX_MASTER_DMACA_M1			9
+
+/* HSB slaves */
+#define HMATRIX_SLAVE_SRAM0			0
+#define HMATRIX_SLAVE_SRAM1			1
+#define HMATRIX_SLAVE_PBA			2
+#define HMATRIX_SLAVE_PBB			3
+#define HMATRIX_SLAVE_EBI			4
+#define HMATRIX_SLAVE_USBA			5
+#define HMATRIX_SLAVE_LCDC			6
+#define HMATRIX_SLAVE_DMACA			7
+
+#endif /* __ASM_AVR32_ARCH_HMATRIX_H__ */
diff --git a/include/asm-avr32/arch-at32ap700x/hmatrix2.h b/include/asm-avr32/arch-at32ap700x/hmatrix2.h
deleted file mode 100644
index b0e787a92f..0000000000
--- a/include/asm-avr32/arch-at32ap700x/hmatrix2.h
+++ /dev/null
@@ -1,232 +0,0 @@
-/*
- * Register definition for the High-speed Bus Matrix
- */
-#ifndef __ASM_AVR32_HMATRIX2_H__
-#define __ASM_AVR32_HMATRIX2_H__
-
-/* HMATRIX2 register offsets */
-#define HMATRIX2_MCFG0				0x0000
-#define HMATRIX2_MCFG1				0x0004
-#define HMATRIX2_MCFG2				0x0008
-#define HMATRIX2_MCFG3				0x000c
-#define HMATRIX2_MCFG4				0x0010
-#define HMATRIX2_MCFG5				0x0014
-#define HMATRIX2_MCFG6				0x0018
-#define HMATRIX2_MCFG7				0x001c
-#define HMATRIX2_MCFG8				0x0020
-#define HMATRIX2_MCFG9				0x0024
-#define HMATRIX2_MCFG10				0x0028
-#define HMATRIX2_MCFG11				0x002c
-#define HMATRIX2_MCFG12				0x0030
-#define HMATRIX2_MCFG13				0x0034
-#define HMATRIX2_MCFG14				0x0038
-#define HMATRIX2_MCFG15				0x003c
-#define HMATRIX2_SCFG0				0x0040
-#define HMATRIX2_SCFG1				0x0044
-#define HMATRIX2_SCFG2				0x0048
-#define HMATRIX2_SCFG3				0x004c
-#define HMATRIX2_SCFG4				0x0050
-#define HMATRIX2_SCFG5				0x0054
-#define HMATRIX2_SCFG6				0x0058
-#define HMATRIX2_SCFG7				0x005c
-#define HMATRIX2_SCFG8				0x0060
-#define HMATRIX2_SCFG9				0x0064
-#define HMATRIX2_SCFG10				0x0068
-#define HMATRIX2_SCFG11				0x006c
-#define HMATRIX2_SCFG12				0x0070
-#define HMATRIX2_SCFG13				0x0074
-#define HMATRIX2_SCFG14				0x0078
-#define HMATRIX2_SCFG15				0x007c
-#define HMATRIX2_PRAS0				0x0080
-#define HMATRIX2_PRBS0				0x0084
-#define HMATRIX2_PRAS1				0x0088
-#define HMATRIX2_PRBS1				0x008c
-#define HMATRIX2_PRAS2				0x0090
-#define HMATRIX2_PRBS2				0x0094
-#define HMATRIX2_PRAS3				0x0098
-#define HMATRIX2_PRBS3				0x009c
-#define HMATRIX2_PRAS4				0x00a0
-#define HMATRIX2_PRBS4				0x00a4
-#define HMATRIX2_PRAS5				0x00a8
-#define HMATRIX2_PRBS5				0x00ac
-#define HMATRIX2_PRAS6				0x00b0
-#define HMATRIX2_PRBS6				0x00b4
-#define HMATRIX2_PRAS7				0x00b8
-#define HMATRIX2_PRBS7				0x00bc
-#define HMATRIX2_PRAS8				0x00c0
-#define HMATRIX2_PRBS8				0x00c4
-#define HMATRIX2_PRAS9				0x00c8
-#define HMATRIX2_PRBS9				0x00cc
-#define HMATRIX2_PRAS10				0x00d0
-#define HMATRIX2_PRBS10				0x00d4
-#define HMATRIX2_PRAS11				0x00d8
-#define HMATRIX2_PRBS11				0x00dc
-#define HMATRIX2_PRAS12				0x00e0
-#define HMATRIX2_PRBS12				0x00e4
-#define HMATRIX2_PRAS13				0x00e8
-#define HMATRIX2_PRBS13				0x00ec
-#define HMATRIX2_PRAS14				0x00f0
-#define HMATRIX2_PRBS14				0x00f4
-#define HMATRIX2_PRAS15				0x00f8
-#define HMATRIX2_PRBS15				0x00fc
-#define HMATRIX2_MRCR				0x0100
-#define HMATRIX2_SFR0				0x0110
-#define HMATRIX2_SFR1				0x0114
-#define HMATRIX2_SFR2				0x0118
-#define HMATRIX2_SFR3				0x011c
-#define HMATRIX2_SFR4				0x0120
-#define HMATRIX2_SFR5				0x0124
-#define HMATRIX2_SFR6				0x0128
-#define HMATRIX2_SFR7				0x012c
-#define HMATRIX2_SFR8				0x0130
-#define HMATRIX2_SFR9				0x0134
-#define HMATRIX2_SFR10				0x0138
-#define HMATRIX2_SFR11				0x013c
-#define HMATRIX2_SFR12				0x0140
-#define HMATRIX2_SFR13				0x0144
-#define HMATRIX2_SFR14				0x0148
-#define HMATRIX2_SFR15				0x014c
-#define HMATRIX2_VERSION			0x01fc
-
-/* Bitfields in MCFG0 */
-#define HMATRIX2_ULBT_OFFSET			0
-#define HMATRIX2_ULBT_SIZE			3
-
-/* Bitfields in SCFG0 */
-#define HMATRIX2_SLOT_CYCLE_OFFSET		0
-#define HMATRIX2_SLOT_CYCLE_SIZE		8
-#define HMATRIX2_DEFMSTR_TYPE_OFFSET		16
-#define HMATRIX2_DEFMSTR_TYPE_SIZE		2
-#define HMATRIX2_FIXED_DEFMSTR_OFFSET		18
-#define HMATRIX2_FIXED_DEFMSTR_SIZE		4
-#define HMATRIX2_ARBT_OFFSET			24
-#define HMATRIX2_ARBT_SIZE			2
-
-/* Bitfields in PRAS0 */
-#define HMATRIX2_M0PR_OFFSET			0
-#define HMATRIX2_M0PR_SIZE			4
-#define HMATRIX2_M1PR_OFFSET			4
-#define HMATRIX2_M1PR_SIZE			4
-#define HMATRIX2_M2PR_OFFSET			8
-#define HMATRIX2_M2PR_SIZE			4
-#define HMATRIX2_M3PR_OFFSET			12
-#define HMATRIX2_M3PR_SIZE			4
-#define HMATRIX2_M4PR_OFFSET			16
-#define HMATRIX2_M4PR_SIZE			4
-#define HMATRIX2_M5PR_OFFSET			20
-#define HMATRIX2_M5PR_SIZE			4
-#define HMATRIX2_M6PR_OFFSET			24
-#define HMATRIX2_M6PR_SIZE			4
-#define HMATRIX2_M7PR_OFFSET			28
-#define HMATRIX2_M7PR_SIZE			4
-
-/* Bitfields in PRBS0 */
-#define HMATRIX2_M8PR_OFFSET			0
-#define HMATRIX2_M8PR_SIZE			4
-#define HMATRIX2_M9PR_OFFSET			4
-#define HMATRIX2_M9PR_SIZE			4
-#define HMATRIX2_M10PR_OFFSET			8
-#define HMATRIX2_M10PR_SIZE			4
-#define HMATRIX2_M11PR_OFFSET			12
-#define HMATRIX2_M11PR_SIZE			4
-#define HMATRIX2_M12PR_OFFSET			16
-#define HMATRIX2_M12PR_SIZE			4
-#define HMATRIX2_M13PR_OFFSET			20
-#define HMATRIX2_M13PR_SIZE			4
-#define HMATRIX2_M14PR_OFFSET			24
-#define HMATRIX2_M14PR_SIZE			4
-#define HMATRIX2_M15PR_OFFSET			28
-#define HMATRIX2_M15PR_SIZE			4
-
-/* Bitfields in MRCR */
-#define HMATRIX2_RBC0_OFFSET			0
-#define HMATRIX2_RBC0_SIZE			1
-#define HMATRIX2_RBC1_OFFSET			1
-#define HMATRIX2_RBC1_SIZE			1
-#define HMATRIX2_RBC2_OFFSET			2
-#define HMATRIX2_RBC2_SIZE			1
-#define HMATRIX2_RBC3_OFFSET			3
-#define HMATRIX2_RBC3_SIZE			1
-#define HMATRIX2_RBC4_OFFSET			4
-#define HMATRIX2_RBC4_SIZE			1
-#define HMATRIX2_RBC5_OFFSET			5
-#define HMATRIX2_RBC5_SIZE			1
-#define HMATRIX2_RBC6_OFFSET			6
-#define HMATRIX2_RBC6_SIZE			1
-#define HMATRIX2_RBC7_OFFSET			7
-#define HMATRIX2_RBC7_SIZE			1
-#define HMATRIX2_RBC8_OFFSET			8
-#define HMATRIX2_RBC8_SIZE			1
-#define HMATRIX2_RBC9_OFFSET			9
-#define HMATRIX2_RBC9_SIZE			1
-#define HMATRIX2_RBC10_OFFSET			10
-#define HMATRIX2_RBC10_SIZE			1
-#define HMATRIX2_RBC11_OFFSET			11
-#define HMATRIX2_RBC11_SIZE			1
-#define HMATRIX2_RBC12_OFFSET			12
-#define HMATRIX2_RBC12_SIZE			1
-#define HMATRIX2_RBC13_OFFSET			13
-#define HMATRIX2_RBC13_SIZE			1
-#define HMATRIX2_RBC14_OFFSET			14
-#define HMATRIX2_RBC14_SIZE			1
-#define HMATRIX2_RBC15_OFFSET			15
-#define HMATRIX2_RBC15_SIZE			1
-
-/* Bitfields in SFR0 */
-#define HMATRIX2_SFR_OFFSET			0
-#define HMATRIX2_SFR_SIZE			32
-
-/* Bitfields in SFR4 */
-#define HMATRIX2_CS1A_OFFSET			1
-#define HMATRIX2_CS1A_SIZE			1
-#define HMATRIX2_CS3A_OFFSET			3
-#define HMATRIX2_CS3A_SIZE			1
-#define HMATRIX2_CS4A_OFFSET			4
-#define HMATRIX2_CS4A_SIZE			1
-#define HMATRIX2_CS5A_OFFSET			5
-#define HMATRIX2_CS5A_SIZE			1
-#define HMATRIX2_DBPUC_OFFSET			8
-#define HMATRIX2_DBPUC_SIZE			1
-
-/* Bitfields in VERSION */
-#define HMATRIX2_VERSION_OFFSET			0
-#define HMATRIX2_VERSION_SIZE			12
-#define HMATRIX2_MFN_OFFSET			16
-#define HMATRIX2_MFN_SIZE			3
-
-/* Constants for ULBT */
-#define HMATRIX2_ULBT_INFINITE			0
-#define HMATRIX2_ULBT_SINGLE			1
-#define HMATRIX2_ULBT_FOUR_BEAT			2
-#define HMATRIX2_ULBT_SIXTEEN_BEAT		4
-
-/* Constants for DEFMSTR_TYPE */
-#define HMATRIX2_DEFMSTR_TYPE_NO_DEFAULT	0
-#define HMATRIX2_DEFMSTR_TYPE_LAST_DEFAULT	1
-#define HMATRIX2_DEFMSTR_TYPE_FIXED_DEFAULT	2
-
-/* Constants for ARBT */
-#define HMATRIX2_ARBT_ROUND_ROBIN		0
-#define HMATRIX2_ARBT_FIXED_PRIORITY		1
-
-/* Bit manipulation macros */
-#define HMATRIX2_BIT(name)					\
-	(1 << HMATRIX2_##name##_OFFSET)
-#define HMATRIX2_BF(name,value)					\
-	(((value) & ((1 << HMATRIX2_##name##_SIZE) - 1))	\
-	 << HMATRIX2_##name##_OFFSET)
-#define HMATRIX2_BFEXT(name,value)				\
-	(((value) >> HMATRIX2_##name##_OFFSET)			\
-	 & ((1 << HMATRIX2_##name##_SIZE) - 1))
-#define HMATRIX2_BFINS(name,value,old)				\
-	(((old) & ~(((1 << HMATRIX2_##name##_SIZE) - 1)		\
-		    << HMATRIX2_##name##_OFFSET))		\
-	 | HMATRIX2_BF(name,value))
-
-/* Register access macros */
-#define hmatrix2_readl(reg)					\
-	readl((void *)HMATRIX_BASE + HMATRIX2_##reg)
-#define hmatrix2_writel(reg,value)				\
-	writel((value), (void *)HMATRIX_BASE + HMATRIX2_##reg)
-
-#endif /* __ASM_AVR32_HMATRIX2_H__ */
diff --git a/include/asm-avr32/arch-at32ap700x/memory-map.h b/include/asm-avr32/arch-at32ap700x/memory-map.h
index 5513e88e7b..6592c039fa 100644
--- a/include/asm-avr32/arch-at32ap700x/memory-map.h
+++ b/include/asm-avr32/arch-at32ap700x/memory-map.h
@@ -22,6 +22,26 @@
 #ifndef __AT32AP7000_MEMORY_MAP_H__
 #define __AT32AP7000_MEMORY_MAP_H__
 
+/* Internal and external memories */
+#define EBI_SRAM_CS0_BASE			0x00000000
+#define EBI_SRAM_CS0_SIZE			0x04000000
+#define EBI_SRAM_CS4_BASE			0x04000000
+#define EBI_SRAM_CS4_SIZE			0x04000000
+#define EBI_SRAM_CS2_BASE			0x08000000
+#define EBI_SRAM_CS2_SIZE			0x04000000
+#define EBI_SRAM_CS3_BASE			0x0c000000
+#define EBI_SRAM_CS3_SIZE			0x04000000
+#define EBI_SRAM_CS1_BASE			0x10000000
+#define EBI_SRAM_CS1_SIZE			0x10000000
+#define EBI_SRAM_CS5_BASE			0x20000000
+#define EBI_SRAM_CS5_SIZE			0x04000000
+
+#define EBI_SDRAM_BASE				EBI_SRAM_CS1_BASE
+#define EBI_SDRAM_SIZE				EBI_SRAM_CS1_SIZE
+
+#define INTERNAL_SRAM_BASE			0x24000000
+#define INTERNAL_SRAM_SIZE			0x00008000
+
 /* Devices on the High Speed Bus (HSB) */
 #define LCDC_BASE				0xFF000000
 #define DMAC_BASE				0xFF200000
diff --git a/include/asm-avr32/hmatrix-common.h b/include/asm-avr32/hmatrix-common.h
new file mode 100644
index 0000000000..4b7e6105dd
--- /dev/null
+++ b/include/asm-avr32/hmatrix-common.h
@@ -0,0 +1,131 @@
+/*
+ * Copyright (C) 2008 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_AVR32_HMATRIX_COMMON_H__
+#define __ASM_AVR32_HMATRIX_COMMON_H__
+
+/* HMATRIX register offsets */
+struct hmatrix_regs {
+	u32	MCFG[16];
+	u32	SCFG[16];
+	struct {
+		u32	A;
+		u32	B;
+	} PRS[16];
+	u32	MRCR;
+	u32	__reserved[3];
+	u32	SFR[16];
+};
+
+/* Bitfields in MCFG */
+#define HMATRIX_ULBT_OFFSET			0
+#define HMATRIX_ULBT_SIZE			3
+
+/* Bitfields in SCFG */
+#define HMATRIX_SLOT_CYCLE_OFFSET		0
+#define HMATRIX_SLOT_CYCLE_SIZE			8
+#define HMATRIX_DEFMSTR_TYPE_OFFSET		16
+#define HMATRIX_DEFMSTR_TYPE_SIZE		2
+#define HMATRIX_FIXED_DEFMSTR_OFFSET		18
+#define HMATRIX_FIXED_DEFMSTR_SIZE		4
+#define HMATRIX_ARBT_OFFSET			24
+#define HMATRIX_ARBT_SIZE			1
+
+/* Bitfields in PRS.A */
+#define HMATRIX_M0PR_OFFSET			0
+#define HMATRIX_M0PR_SIZE			4
+#define HMATRIX_M1PR_OFFSET			4
+#define HMATRIX_M1PR_SIZE			4
+#define HMATRIX_M2PR_OFFSET			8
+#define HMATRIX_M2PR_SIZE			4
+#define HMATRIX_M3PR_OFFSET			12
+#define HMATRIX_M3PR_SIZE			4
+#define HMATRIX_M4PR_OFFSET			16
+#define HMATRIX_M4PR_SIZE			4
+#define HMATRIX_M5PR_OFFSET			20
+#define HMATRIX_M5PR_SIZE			4
+#define HMATRIX_M6PR_OFFSET			24
+#define HMATRIX_M6PR_SIZE			4
+#define HMATRIX_M7PR_OFFSET			28
+#define HMATRIX_M7PR_SIZE			4
+
+/* Bitfields in PRS.B */
+#define HMATRIX_M8PR_OFFSET			0
+#define HMATRIX_M8PR_SIZE			4
+#define HMATRIX_M9PR_OFFSET			4
+#define HMATRIX_M9PR_SIZE			4
+#define HMATRIX_M10PR_OFFSET			8
+#define HMATRIX_M10PR_SIZE			4
+#define HMATRIX_M11PR_OFFSET			12
+#define HMATRIX_M11PR_SIZE			4
+#define HMATRIX_M12PR_OFFSET			16
+#define HMATRIX_M12PR_SIZE			4
+#define HMATRIX_M13PR_OFFSET			20
+#define HMATRIX_M13PR_SIZE			4
+#define HMATRIX_M14PR_OFFSET			24
+#define HMATRIX_M14PR_SIZE			4
+#define HMATRIX_M15PR_OFFSET			28
+#define HMATRIX_M15PR_SIZE			4
+
+/* Constants for ULBT */
+#define HMATRIX_ULBT_INFINITE			0
+#define HMATRIX_ULBT_SINGLE			1
+#define HMATRIX_ULBT_FOUR_BEAT			2
+#define HMATRIX_ULBT_EIGHT_BEAT			3
+#define HMATRIX_ULBT_SIXTEEN_BEAT		4
+
+/* Constants for DEFMSTR_TYPE */
+#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT		0
+#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT	1
+#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT	2
+
+/* Constants for ARBT */
+#define HMATRIX_ARBT_ROUND_ROBIN		0
+#define HMATRIX_ARBT_FIXED_PRIORITY		1
+
+/* Bit manipulation macros */
+#define HMATRIX_BIT(name)					\
+	(1 << HMATRIX_##name##_OFFSET)
+#define HMATRIX_BF(name,value)					\
+	(((value) & ((1 << HMATRIX_##name##_SIZE) - 1))		\
+	 << HMATRIX_##name##_OFFSET)
+#define HMATRIX_BFEXT(name,value)				\
+	(((value) >> HMATRIX_##name##_OFFSET)			\
+	 & ((1 << HMATRIX_##name##_SIZE) - 1))
+#define HMATRIX_BFINS(name,value,old)				\
+	(((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1)		\
+		    << HMATRIX_##name##_OFFSET))		\
+	 | HMATRIX_BF(name,value))
+
+/* Register access macros */
+#define __hmatrix_reg(reg)					\
+	(((volatile struct hmatrix_regs *)HMATRIX_BASE)->reg)
+#define hmatrix_read(reg)					\
+	(__hmatrix_reg(reg))
+#define hmatrix_write(reg, value)				\
+	do { __hmatrix_reg(reg) = (value); } while (0)
+
+#define hmatrix_slave_read(slave, reg)				\
+	hmatrix_read(reg[HMATRIX_SLAVE_##slave])
+#define hmatrix_slave_write(slave, reg, value)			\
+	hmatrix_write(reg[HMATRIX_SLAVE_##slave], value)
+
+#endif /* __ASM_AVR32_HMATRIX_COMMON_H__ */
diff --git a/include/asm-avr32/sdram.h b/include/asm-avr32/sdram.h
index 833af6e6ad..7bdefc1fd2 100644
--- a/include/asm-avr32/sdram.h
+++ b/include/asm-avr32/sdram.h
@@ -22,15 +22,32 @@
 #ifndef __ASM_AVR32_SDRAM_H
 #define __ASM_AVR32_SDRAM_H
 
-struct sdram_info {
-	unsigned long phys_addr;
-	unsigned int row_bits, col_bits, bank_bits;
-	unsigned int cas, twr, trc, trp, trcd, tras, txsr;
+struct sdram_config {
+	/* Number of data bits. */
+	enum {
+		SDRAM_DATA_16BIT,
+		SDRAM_DATA_32BIT,
+	} data_bits;
+
+	/* Number of address bits */
+	uint8_t row_bits, col_bits, bank_bits;
+
+	/* SDRAM timings in cycles */
+	uint8_t cas, twr, trc, trp, trcd, tras, txsr;
 
 	/* SDRAM refresh period in cycles */
 	unsigned long refresh_period;
 };
 
-extern unsigned long sdram_init(const struct sdram_info *info);
+/*
+ * Attempt to initialize the SDRAM controller using the specified
+ * parameters. Return the expected size of the memory area based on
+ * the number of address and data bits.
+ *
+ * The caller should verify that the configuration is correct by
+ * running a memory test, e.g. get_ram_size().
+ */
+extern unsigned long sdram_init(void *sdram_base,
+			const struct sdram_config *config);
 
 #endif /* __ASM_AVR32_SDRAM_H */
diff --git a/include/asm-avr32/sections.h b/include/asm-avr32/sections.h
index 75373abde7..fe819b2db6 100644
--- a/include/asm-avr32/sections.h
+++ b/include/asm-avr32/sections.h
@@ -25,15 +25,8 @@
 /* References to section boundaries */
 
 extern char _text[], _etext[];
-extern char __flashprog_start[], __flashprog_end[];
 extern char _data[], __data_lma[], _edata[], __edata_lma[];
 extern char __got_start[], __got_lma[], __got_end[];
 extern char _end[];
 
-/*
- * Everything in .flashprog will be locked in the icache so it doesn't
- * get disturbed when executing flash commands.
- */
-#define __flashprog __attribute__((section(".flashprog"), __noinline__))
-
 #endif /* __ASM_AVR32_SECTIONS_H */
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 5aad043d89..3fc9975637 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -24,6 +24,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/arch/memory-map.h>
+
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
 #define CONFIG_AT32AP7000		1
@@ -112,8 +114,11 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_MMC
+
+#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
 
 #define CONFIG_ATMEL_USART		1
 #define CONFIG_MACB			1
@@ -137,11 +142,9 @@
 
 #define CFG_MONITOR_BASE		CFG_FLASH_BASE
 
-#define CFG_INTRAM_BASE			0x24000000
-#define CFG_INTRAM_SIZE			0x8000
-
-#define CFG_SDRAM_BASE			0x10000000
-#define CFG_SDRAM_16BIT			1
+#define CFG_INTRAM_BASE			INTERNAL_SRAM_BASE
+#define CFG_INTRAM_SIZE			INTERNAL_SRAM_SIZE
+#define CFG_SDRAM_BASE			EBI_SDRAM_BASE
 
 #define CFG_ENV_IS_IN_FLASH		1
 #define CFG_ENV_SIZE			65536
@@ -150,27 +153,20 @@
 #define CFG_INIT_SP_ADDR		(CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
 
 #define CFG_MALLOC_LEN			(256*1024)
-#define CFG_MALLOC_END							\
-	({								\
-		DECLARE_GLOBAL_DATA_PTR;				\
-		CFG_SDRAM_BASE + gd->sdram_size;			\
-	})
-#define CFG_MALLOC_START		(CFG_MALLOC_END - CFG_MALLOC_LEN)
-
 #define CFG_DMA_ALLOC_LEN		(16384)
 
 /* Allow 4MB for the kernel run-time image */
-#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00400000)
+#define CFG_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00400000)
 #define CFG_BOOTPARAMS_LEN		(16 * 1024)
 
 /* Other configuration settings that shouldn't have to change all that often */
-#define CFG_PROMPT			"Uboot> "
+#define CFG_PROMPT			"U-Boot> "
 #define CFG_CBSIZE			256
 #define CFG_MAXARGS			16
 #define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_LONGHELP			1
 
-#define CFG_MEMTEST_START		CFG_SDRAM_BASE
+#define CFG_MEMTEST_START		EBI_SDRAM_BASE
 #define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x1f00000)
 
 #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 95aeab6d4e..ba18eb63c7 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -24,6 +24,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/arch/memory-map.h>
+
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
 #define CONFIG_AT32AP7000		1
@@ -139,9 +141,9 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_MMC
-#define CONFIG_CMD_REGINFO
 
 #undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_SETGETDCR
 #undef CONFIG_CMD_XIMG
 
@@ -170,10 +172,9 @@
 
 #define CFG_MONITOR_BASE		CFG_FLASH_BASE
 
-#define CFG_INTRAM_BASE			0x24000000
-#define CFG_INTRAM_SIZE			0x8000
-
-#define CFG_SDRAM_BASE			0x10000000
+#define CFG_INTRAM_BASE			INTERNAL_SRAM_BASE
+#define CFG_INTRAM_SIZE			INTERNAL_SRAM_SIZE
+#define CFG_SDRAM_BASE			EBI_SDRAM_BASE
 
 #define CFG_ENV_IS_IN_FLASH		1
 #define CFG_ENV_SIZE			65536
@@ -185,17 +186,17 @@
 #define CFG_DMA_ALLOC_LEN		(16384)
 
 /* Allow 4MB for the kernel run-time image */
-#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00400000)
+#define CFG_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00400000)
 #define CFG_BOOTPARAMS_LEN		(16 * 1024)
 
 /* Other configuration settings that shouldn't have to change all that often */
-#define CFG_PROMPT			"Uboot> "
+#define CFG_PROMPT			"U-Boot> "
 #define CFG_CBSIZE			256
-#define CFG_MAXARGS			8
+#define CFG_MAXARGS			16
 #define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_LONGHELP			1
 
-#define CFG_MEMTEST_START		CFG_SDRAM_BASE
+#define CFG_MEMTEST_START		EBI_SDRAM_BASE
 #define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x700000)
 #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 
diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index 194788b18d..a528ddfb0e 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -24,6 +24,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/arch/memory-map.h>
+
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
 #define CONFIG_AT32AP7001		1
@@ -153,10 +155,9 @@
 
 #define CFG_MONITOR_BASE		CFG_FLASH_BASE
 
-#define CFG_INTRAM_BASE			0x24000000
-#define CFG_INTRAM_SIZE			0x8000
-
-#define CFG_SDRAM_BASE			0x10000000
+#define CFG_INTRAM_BASE			INTERNAL_SRAM_BASE
+#define CFG_INTRAM_SIZE			INTERNAL_SRAM_SIZE
+#define CFG_SDRAM_BASE			EBI_SDRAM_BASE
 
 #define CFG_ENV_IS_IN_FLASH		1
 #define CFG_ENV_SIZE			65536
@@ -167,17 +168,17 @@
 #define CFG_MALLOC_LEN			(256*1024)
 
 /* Allow 4MB for the kernel run-time image */
-#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00400000)
+#define CFG_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00400000)
 #define CFG_BOOTPARAMS_LEN		(16 * 1024)
 
 /* Other configuration settings that shouldn't have to change all that often */
-#define CFG_PROMPT			"Uboot> "
+#define CFG_PROMPT			"U-Boot> "
 #define CFG_CBSIZE			256
 #define CFG_MAXARGS			16
 #define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_LONGHELP			1
 
-#define CFG_MEMTEST_START		CFG_SDRAM_BASE
+#define CFG_MEMTEST_START		EBI_SDRAM_BASE
 #define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x700000)
 #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 
diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index b81fc21270..fc9585e84d 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -24,6 +24,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/arch/memory-map.h>
+
 #define CONFIG_AVR32			1
 #define CONFIG_AT32AP			1
 #define CONFIG_AT32AP7002		1
@@ -153,11 +155,9 @@
 
 #define CFG_MONITOR_BASE		CFG_FLASH_BASE
 
-#define CFG_INTRAM_BASE			0x24000000
-#define CFG_INTRAM_SIZE			0x8000
-
-#define CFG_SDRAM_BASE			0x10000000
-#define CFG_SDRAM_16BIT			1
+#define CFG_INTRAM_BASE			INTERNAL_SRAM_BASE
+#define CFG_INTRAM_SIZE			INTERNAL_SRAM_SIZE
+#define CFG_SDRAM_BASE			EBI_SDRAM_BASE
 
 #define CFG_ENV_IS_IN_FLASH		1
 #define CFG_ENV_SIZE			65536
@@ -168,17 +168,17 @@
 #define CFG_MALLOC_LEN			(256*1024)
 
 /* Allow 2MB for the kernel run-time image */
-#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00200000)
+#define CFG_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00200000)
 #define CFG_BOOTPARAMS_LEN		(16 * 1024)
 
 /* Other configuration settings that shouldn't have to change all that often */
-#define CFG_PROMPT			"Uboot> "
+#define CFG_PROMPT			"U-Boot> "
 #define CFG_CBSIZE			256
 #define CFG_MAXARGS			16
 #define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_LONGHELP			1
 
-#define CFG_MEMTEST_START		CFG_SDRAM_BASE
+#define CFG_MEMTEST_START		EBI_SDRAM_BASE
 #define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x700000)
 #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 
diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h
new file mode 100644
index 0000000000..9fd49a53a3
--- /dev/null
+++ b/include/configs/atstk1006.h
@@ -0,0 +1,203 @@
+/*
+ * Copyright (C) 2005-2006 Atmel Corporation
+ *
+ * Configuration settings for the ATSTK1002 CPU daughterboard
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/memory-map.h>
+
+#define CONFIG_AVR32			1
+#define CONFIG_AT32AP			1
+#define CONFIG_AT32AP7000		1
+#define CONFIG_ATSTK1006		1
+#define CONFIG_ATSTK1000		1
+
+#define CONFIG_ATSTK1000_EXT_FLASH	1
+
+/*
+ * Timer clock frequency. We're using the CPU-internal COUNT register
+ * for this, so this is equivalent to the CPU core clock frequency
+ */
+#define CFG_HZ				1000
+
+/*
+ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
+ * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
+ * PLL frequency.
+ * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz
+ */
+#define CONFIG_PLL			1
+#define CFG_POWER_MANAGER		1
+#define CFG_OSC0_HZ			20000000
+#define CFG_PLL0_DIV			1
+#define CFG_PLL0_MUL			7
+#define CFG_PLL0_SUPPRESS_CYCLES	16
+/*
+ * Set the CPU running at:
+ * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz
+ */
+#define CFG_CLKDIV_CPU			0
+/*
+ * Set the HSB running at:
+ * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz
+ */
+#define CFG_CLKDIV_HSB			1
+/*
+ * Set the PBA running at:
+ * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz
+ */
+#define CFG_CLKDIV_PBA			2
+/*
+ * Set the PBB running at:
+ * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz
+ */
+#define CFG_CLKDIV_PBB			1
+
+/*
+ * The PLLOPT register controls the PLL like this:
+ *   icp = PLLOPT<2>
+ *   ivco = PLLOPT<1:0>
+ *
+ * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
+ */
+#define CFG_PLL0_OPT			0x04
+
+#undef CONFIG_USART0
+#define CONFIG_USART1			1
+#undef CONFIG_USART2
+#undef CONFIG_USART3
+
+/* User serviceable stuff */
+#define CONFIG_DOS_PARTITION		1
+
+#define CONFIG_CMDLINE_TAG		1
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
+
+#define CONFIG_STACKSIZE		(2048)
+
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_BOOTARGS							\
+	"console=ttyS0 root=mtd3 fbmem=2400k"
+
+#define CONFIG_BOOTCOMMAND						\
+	"fsload; bootm $(fileaddr)"
+
+/*
+ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
+ * data on the serial line may interrupt the boot sequence.
+ */
+#define CONFIG_BOOTDELAY		1
+#define CONFIG_AUTOBOOT			1
+#define CONFIG_AUTOBOOT_KEYED		1
+#define CONFIG_AUTOBOOT_PROMPT				\
+	"Press SPACE to abort autoboot in %d seconds\n"
+#define CONFIG_AUTOBOOT_DELAY_STR	"d"
+#define CONFIG_AUTOBOOT_STOP_STR	" "
+
+/*
+ * After booting the board for the first time, new ethernet addresses
+ * should be generated and assigned to the environment variables
+ * "ethaddr" and "eth1addr". This is normally done during production.
+ */
+#define CONFIG_OVERWRITE_ETHADDR_ONCE	1
+#define CONFIG_NET_MULTI		1
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MMC
+
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
+
+#define CONFIG_ATMEL_USART		1
+#define CONFIG_MACB			1
+#define CONFIG_PIO2			1
+#define CFG_NR_PIOS			5
+#define CFG_HSDRAMC			1
+#define CONFIG_MMC			1
+
+#define CFG_DCACHE_LINESZ		32
+#define CFG_ICACHE_LINESZ		32
+
+#define CONFIG_NR_DRAM_BANKS		1
+
+/* External flash on STK1000 */
+#if 0
+#define CFG_FLASH_CFI			1
+#define CFG_FLASH_CFI_DRIVER		1
+#endif
+
+#define CFG_FLASH_BASE			0x00000000
+#define CFG_FLASH_SIZE			0x800000
+#define CFG_MAX_FLASH_BANKS		1
+#define CFG_MAX_FLASH_SECT		135
+
+#define CFG_MONITOR_BASE		CFG_FLASH_BASE
+
+#define CFG_INTRAM_BASE			INTERNAL_SRAM_BASE
+#define CFG_INTRAM_SIZE			INTERNAL_SRAM_SIZE
+#define CFG_SDRAM_BASE			EBI_SDRAM_BASE
+
+#define CFG_ENV_IS_IN_FLASH		1
+#define CFG_ENV_SIZE			65536
+#define CFG_ENV_ADDR			(CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE)
+
+#define CFG_INIT_SP_ADDR		(CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
+
+#define CFG_MALLOC_LEN			(256*1024)
+#define CFG_DMA_ALLOC_LEN		(16384)
+
+/* Allow 4MB for the kernel run-time image */
+#define CFG_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00400000)
+#define CFG_BOOTPARAMS_LEN		(16 * 1024)
+
+/* Other configuration settings that shouldn't have to change all that often */
+#define CFG_PROMPT			"U-Boot> "
+#define CFG_CBSIZE			256
+#define CFG_MAXARGS			16
+#define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_LONGHELP			1
+
+#define CFG_MEMTEST_START		EBI_SDRAM_BASE
+#define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x3f00000)
+#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
+
+#endif /* __CONFIG_H */