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authorwdenk <wdenk>2004-03-14 14:09:05 +0000
committerwdenk <wdenk>2004-03-14 14:09:05 +0000
commit4d13cbad1c81ad7901151fec381bae8c30f4338a (patch)
treeecb8e4694a7a8ddea27f9f6838c61393cbd4c12b /include
parentc3f9d4939af90eb8e30119601c86c05bde6c7345 (diff)
downloadblackbird-obmc-uboot-4d13cbad1c81ad7901151fec381bae8c30f4338a.tar.gz
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* Patch by Tolunay Orkun, 5 Mar 2004:
Fix early board initialization for Cogent CSB272 board * Patch by Ed Okerson, 3 Mar 2004: fix CFI flash writes for little endian systems * Patch by Reinhard Meyer, 01 Mar 2004: generalize USB and IDE support for MPC5200 with according changes to IceCube.h and TOP5200.h add Am29LV256 256 MBit FLASH support for TOP5200 boards add info about USB and IDE to README
Diffstat (limited to 'include')
-rw-r--r--include/configs/IceCube.h4
-rw-r--r--include/configs/TOP5200.h78
-rw-r--r--include/configs/csb272.h2
-rw-r--r--include/flash.h3
4 files changed, 78 insertions, 9 deletions
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 3538e1c2be..39a91424ae 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -305,8 +305,8 @@
* USB stuff
*-----------------------------------------------------------------------
*/
-#define CONFIG_USB_CDMFDC5xxx 0x0001BBBB
-#define CONFIG_USB_GPSCFG5xxx 0x00001000
+#define CONFIG_USB_CLOCK 0x0001BBBB
+#define CONFIG_USB_CONFIG 0x00001000
/*-----------------------------------------------------------------------
* IDE/ATA stuff Supports IDE harddisk
diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h
index ae4677d6a8..930ed2722d 100644
--- a/include/configs/TOP5200.h
+++ b/include/configs/TOP5200.h
@@ -63,7 +63,7 @@
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
-#ifdef CONFIG_EVAL5200 /* PCI is supported with Evaluation board only */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
/*
* PCI Mapping:
* 0x40000000 - 0x4fffffff - PCI Memory
@@ -89,11 +89,41 @@
#endif
+/* USB */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
+
+# define CONFIG_USB_OHCI
+# define CONFIG_USB_CLOCK 0x0001bbbb
+# define CONFIG_USB_CONFIG 0x00005000
+# define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
+# define CONFIG_DOS_PARTITION
+# define CONFIG_USB_STORAGE
+
+#else
+
+# define ADD_USB_CMD 0
+
+#endif
+
+/* IDE */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
+
+# define ADD_IDE_CMD CFG_CMD_IDE | CFG_CMD_FAT
+# define CONFIG_DOS_PARTITION
+
+#else
+
+# define ADD_IDE_CMD 0
+
+#endif
+
/*
* Supported commands
*/
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
ADD_PCI_CMD | \
+ ADD_USB_CMD | \
+ ADD_IDE_CMD | \
CFG_CMD_ASKENV | \
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
@@ -110,11 +140,13 @@
#include <cmd_confdefs.h>
/*
- * low boot
+ * MUST be low boot - HIGHBOOT is not supported anymore
*/
#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CFG_LOWBOOT 1
# define CFG_LOWBOOT16 1
+#else
+# error "TEXT_BASE must be 0xff000000"
#endif
/*
@@ -168,7 +200,7 @@
#define CONFIG_MISC_INIT_R
#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1
+#define CONFIG_SOFT_I2C 1 /* I2C with softwate support */
#if defined (CONFIG_SOFT_I2C)
# define SDA0 0x40
@@ -187,12 +219,16 @@
# define I2C_TRISTATE {DDR0&=~SDA0;}
# define CFG_I2C_SPEED 100000
# define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_FACT_ADDR 0x57
#endif
#if defined (CONFIG_HARD_I2C)
# define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */
# define CFG_I2C_SPEED 100000 /* 100 kHz */
# define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_EEPROM_ADDR 0x54
+#define CFG_I2C_FACT_ADDR 0x54
#endif
/*
@@ -242,14 +278,12 @@
#define CFG_ENV_IS_IN_EEPROM 1 /* turn on EEPROM env feature */
#define CFG_ENV_OFFSET 0x1000
#define CFG_ENV_SIZE 0x0700
-#define CFG_I2C_EEPROM_ADDR 0x57
/*
* VPD settings
*/
#define CFG_FACT_OFFSET 0x1800
#define CFG_FACT_SIZE 0x0800
-#define CFG_I2C_FACT_ADDR 0x57
/*
* Memory map
@@ -310,7 +344,7 @@
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
#define CFG_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
-#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_LOAD_ADDR 0x200000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
@@ -345,4 +379,36 @@
#define CFG_RESET_ADDRESS 0x7f000000
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CONFIG_IDE_RESET 1
+#define CONFIG_IDE_PREINIT
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (0x0060)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x005c)
+
+/* Interval between registers */
+#define CFG_ATA_STRIDE 4
+
#endif /* __CONFIG_H */
diff --git a/include/configs/csb272.h b/include/configs/csb272.h
index 74577609e7..edec868d54 100644
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -36,7 +36,7 @@
#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_CSB272 1 /* on a Cogent CSB272 board */
-#define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init() */
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f() */
#define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
diff --git a/include/flash.h b/include/flash.h
index bda11d51e7..ce140b3b9d 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -183,6 +183,8 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
#define AMD_ID_LV640U_3 0x22012201 /* 3d ID word for AM29LV640M at 0x3c */
#define AMD_ID_LV128U_2 0x22122212 /* 2d ID word for AM29LV128M at 0x38 */
#define AMD_ID_LV128U_3 0x22002200 /* 3d ID word for AM29LV128M at 0x3c */
+#define AMD_ID_LV256U_2 0x22122212 /* 2d ID word for AM29LV256M at 0x38 */
+#define AMD_ID_LV256U_3 0x22012201 /* 3d ID word for AM29LV256M at 0x3c */
#define AMD_ID_LV320B_2 0x221A221A /* 2d ID word for AM29LV320MB at 0x38 */
#define AMD_ID_LV320B_3 0x22002200 /* 3d ID word for AM29LV320MB at 0x3c */
@@ -345,6 +347,7 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
#define FLASH_AMLV128U 0x00A6 /* AMD 29LV128M ( 128M = 8M x 16 ) */
#define FLASH_AMLV320B 0x00A7 /* AMD 29LV320MB ( 32M = 2M x 16 ) */
#define FLASH_AMLV320T 0x00A8 /* AMD 29LV320MT ( 32M = 2M x 16 ) */
+#define FLASH_AMLV256U 0x00AA /* AMD 29LV256M ( 256M = 16M x 16 ) */
/* Intel 28F256L18T 256M = 128K x 255 + 32k x 4 */
#define FLASH_28F256L18T 0x00B0
#define FLASH_AMDL163T 0x00B2 /* AMD AM29DL163T (2M x 16 ) */
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