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authorClaudiu Manoil <claudiu.manoil@freescale.com>2014-09-05 13:52:36 +0800
committerYork Sun <yorksun@freescale.com>2014-09-08 10:30:33 -0700
commit93f26f130eede8db0cb47afcaf66016987b91731 (patch)
tree1a9acbbcb9b5bae1ae6c96a210ef087f5ecbda93 /include/fsl_mdio.h
parentdf0a5b880d6e53b62ea05b483243dd8675cf4648 (diff)
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net: Merge asm/fsl_enet.h into fsl_mdio.h
fsl_enet.h defines the mapping of the usual MII management registers, which are included in the MDIO register block common to Freescale ethernet controllers. So it shouldn't depend on the CPU architecture but it should be actually part of the arch independent fsl_mdio.h. To remove the arch dependency, merge the content of asm/fsl_enet.h into fsl_mdio.h. Some files (like fm_eth.h) were simply including fsl_enet.h only for phy.h. These were updated to include phy.h instead. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Diffstat (limited to 'include/fsl_mdio.h')
-rw-r--r--include/fsl_mdio.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h
index b58713d896..2137282df3 100644
--- a/include/fsl_mdio.h
+++ b/include/fsl_mdio.h
@@ -10,7 +10,18 @@
#include <net.h>
#include <miiphy.h>
-#include <asm/fsl_enet.h>
+
+struct tsec_mii_mng {
+ u32 miimcfg; /* MII management configuration reg */
+ u32 miimcom; /* MII management command reg */
+ u32 miimadd; /* MII management address reg */
+ u32 miimcon; /* MII management control reg */
+ u32 miimstat; /* MII management status reg */
+ u32 miimind; /* MII management indication reg */
+ u32 ifstat; /* Interface Status Register */
+};
+
+int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc);
/* PHY register offsets */
#define PHY_EXT_PAGE_ACCESS 0x1f
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