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| author | Alexander Stein <alexanders83@web.de> | 2015-07-24 09:22:11 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-12 20:47:41 -0400 |
| commit | 060f9bf57b1dc1f9260bc1b999d054141b87d7d2 (patch) | |
| tree | ac71ebcf77ce3b3c9e163542dc06d16e28fa6a64 /include/configs/rpi.h | |
| parent | 2085ae74dee47ed3da63416aac0305936b43eeea (diff) | |
| download | blackbird-obmc-uboot-060f9bf57b1dc1f9260bc1b999d054141b87d7d2.tar.gz blackbird-obmc-uboot-060f9bf57b1dc1f9260bc1b999d054141b87d7d2.zip | |
ARM: bcm283x: Define CONFIG_SYS_CACHELINE_SIZE
The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.
The ARM Cortex-A7 has a dcache line size of 64 bytes.
Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Diffstat (limited to 'include/configs/rpi.h')
| -rw-r--r-- | include/configs/rpi.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/rpi.h b/include/configs/rpi.h index ab2f4db39f..86422e390d 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -7,6 +7,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_CACHELINE_SIZE 32 + #include "rpi-common.h" #endif |
