diff options
| author | Karlheinz Jerg <karlheinz.jerg@keymile.com> | 2013-01-21 03:55:18 +0000 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2013-02-15 17:47:20 -0600 |
| commit | 5bcd64cf5c5510365a14d11043033eb7b6144ead (patch) | |
| tree | c435d14f6deb3b6a9b25b12c4c812bf3a635dcf4 /include/configs/km | |
| parent | 322bb2056ba90d55603f081ae57a652a06357bac (diff) | |
| download | blackbird-obmc-uboot-5bcd64cf5c5510365a14d11043033eb7b6144ead.tar.gz blackbird-obmc-uboot-5bcd64cf5c5510365a14d11043033eb7b6144ead.zip | |
powerpc/83xx/km: add MV88E6122 switch support for kmvect1
kmvect1 has a UEC2 connection to the piggy board and a UEC0 connection
to the switch MV88E6122. This switch has a connection to a frontport
ethernet interface. The ethernet port used for network booting is
automatically selected by u-boot. If a Piggy is plugged, the Piggy
port is selected (UEC2, eth1). If the Piggy isn't present, the
Frontport is selected (UEC0, eth0).
The switch reset is connected to a GPIO on the PRIO3 board FPGA (GPIO28)
and released at startup.
Signed-off-by: Karlheinz Jerg <karlheinz.jerg@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Diffstat (limited to 'include/configs/km')
| -rw-r--r-- | include/configs/km/km83xx-common.h | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h index a9823d6ef9..1e596c860a 100644 --- a/include/configs/km/km83xx-common.h +++ b/include/configs/km/km83xx-common.h @@ -165,19 +165,15 @@ #define CONFIG_UEC_ETH #define CONFIG_ETHPRIME "UEC0" +#if !defined(CONFIG_MPC8309) #define CONFIG_UEC_ETH1 /* GETH1 */ #define UEC_VERBOSE_DEBUG 1 +#endif #ifdef CONFIG_UEC_ETH1 -#if defined(CONFIG_MPC8309) -#define CONFIG_SYS_UEC1_UCC_NUM 2 /* UCC3 */ -#define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE /* not used in RMII Mode */ -#define CONFIG_SYS_UEC1_TX_CLK QE_CLK12 -#else #define CONFIG_SYS_UEC1_UCC_NUM 3 /* UCC4 */ #define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE /* not used in RMII Mode */ #define CONFIG_SYS_UEC1_TX_CLK QE_CLK17 -#endif #define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH #define CONFIG_SYS_UEC1_PHY_ADDR 0 #define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII |
