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| author | Dirk Eibach <eibach@gdsys.de> | 2013-07-25 19:28:13 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2013-07-25 19:35:42 +0200 |
| commit | e50e8968d994491a426116c3ed6b3e7e26e45f3a (patch) | |
| tree | 0ad97c3680cc54c9b666f2dc9a0c407214113ad2 /include/configs/iocon.h | |
| parent | 869b550ea31b0b12e863203e1e22d4433ebad287 (diff) | |
| download | blackbird-obmc-uboot-e50e8968d994491a426116c3ed6b3e7e26e45f3a.tar.gz blackbird-obmc-uboot-e50e8968d994491a426116c3ed6b3e7e26e45f3a.zip | |
powerpc/ppc4xx: Support gdsys multichannel iocon hardware
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/iocon.h')
| -rw-r--r-- | include/configs/iocon.h | 58 |
1 files changed, 46 insertions, 12 deletions
diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 67a7ab9ee3..9d0d7a10f2 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -63,6 +63,7 @@ * Commands additional to the ones defined in amcc-common.h */ #define CONFIG_CMD_CACHE +#define CONFIG_CMD_FPGAD #undef CONFIG_CMD_EEPROM /* @@ -100,23 +101,53 @@ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_SPEED 400000 + +#define CONFIG_PCA953X /* NXP PCA9554 */ +#define CONFIG_PCA9698 /* NXP PCA9698 */ + /* * Software (bit-bang) I2C driver configuration */ +#define CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F +#define I2C_SOFT_DECLARATIONS2 +#define CONFIG_SYS_I2C_SOFT_SPEED_2 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x7F +#define I2C_SOFT_DECLARATIONS3 +#define CONFIG_SYS_I2C_SOFT_SPEED_3 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE_3 0x7F +#define I2C_SOFT_DECLARATIONS4 +#define CONFIG_SYS_I2C_SOFT_SPEED_4 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE_4 0x7F + +#define CONFIG_SYS_CH7301_I2C {1, 2, 3, 4} #ifndef __ASSEMBLY__ -void fpga_gpio_set(int pin); -void fpga_gpio_clear(int pin); -int fpga_gpio_get(int pin); +void fpga_gpio_set(unsigned int bus, int pin); +void fpga_gpio_clear(unsigned int bus, int pin); +int fpga_gpio_get(unsigned int bus, int pin); #endif #define I2C_ACTIVE { } #define I2C_TRISTATE { } -#define I2C_READ fpga_gpio_get(0x0040) ? 1 : 0 -#define I2C_SDA(bit) if (bit) fpga_gpio_set(0x0040); \ - else fpga_gpio_clear(0x0040) -#define I2C_SCL(bit) if (bit) fpga_gpio_set(0x0020); \ - else fpga_gpio_clear(0x0020) +#define I2C_READ \ + (fpga_gpio_get(I2C_ADAP_HWNR, 0x0040) ? 1 : 0) +#define I2C_SDA(bit) \ + do { \ + if (bit) \ + fpga_gpio_set(I2C_ADAP_HWNR, 0x0040); \ + else \ + fpga_gpio_clear(I2C_ADAP_HWNR, 0x0040); \ + } while (0) +#define I2C_SCL(bit) \ + do { \ + if (bit) \ + fpga_gpio_set(I2C_ADAP_HWNR, 0x0020); \ + else \ + fpga_gpio_clear(I2C_ADAP_HWNR, 0x0020); \ + } while (0) #define I2C_DELAY udelay(25) /* 1/4 I2C clock duration */ /* @@ -236,10 +267,10 @@ int fpga_gpio_get(int pin); #define CONFIG_SYS_FPGA_COUNT 1 -#define CONFIG_SYS_FPGA_PTR \ - { (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE } +#define CONFIG_SYS_MCLINK_MAX 3 -#define CONFIG_SYS_FPGA_COMMON +#define CONFIG_SYS_FPGA_PTR \ + { (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE, NULL, NULL, NULL } /* Memory Bank 3 (Latches) initialization */ #define CONFIG_SYS_LATCH_BASE 0x7f200000 @@ -256,6 +287,9 @@ int fpga_gpio_get(int pin); */ #define CONFIG_SYS_MPC92469AC #define CONFIG_SYS_CH7301 -#define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT +#define CONFIG_SYS_OSD_SCREENS 1 + +#define CONFIG_BITBANGMII /* bit-bang MII PHY management */ +#define CONFIG_BITBANGMII_MULTI #endif /* __CONFIG_H */ |
