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authorMichael Pratt <mpratt@chromium.org>2014-06-18 17:54:02 +0530
committerMinkyu Kang <mk7.kang@samsung.com>2014-06-23 08:45:45 +0900
commit0cf7e18904f245d0ba7a5ed85ed48bea386258d4 (patch)
tree1d0b18c8128e3d6c74be9b5b0341b1055962e471 /include/configs/exynos5-dt.h
parent582693b273b43ec0ca6694d61456ba0a0b9739a9 (diff)
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Exynos: Split 5250 and 5420 memory bank configuration
Since snow has a different memory configuration than peach, split the configuration between the 5250 and 5420. Exynos 5420 supports runtime memory configuration detection, and can make the determination between 4 and 7 banks at runtime. Include the bank size with the number of banks for context to make the number of banks meaningful. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include/configs/exynos5-dt.h')
-rw-r--r--include/configs/exynos5-dt.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
index 3c51650bf0..e36a0313c1 100644
--- a/include/configs/exynos5-dt.h
+++ b/include/configs/exynos5-dt.h
@@ -161,8 +161,6 @@
#define CONFIG_RD_LVL
-#define CONFIG_NR_DRAM_BANKS 8
-#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
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