diff options
| author | wdenk <wdenk> | 2004-02-23 22:22:28 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2004-02-23 22:22:28 +0000 |
| commit | 63e73c9a8ed5b32d9c4067ffaad953e9a8fe8f0a (patch) | |
| tree | 2f8915e0b3024c639748e930b56d60c0d8cf2d99 /include/configs/TOP5200.h | |
| parent | cd0a9de68b03e5a54fd2a08f44be318e4397be01 (diff) | |
| download | blackbird-obmc-uboot-63e73c9a8ed5b32d9c4067ffaad953e9a8fe8f0a.tar.gz blackbird-obmc-uboot-63e73c9a8ed5b32d9c4067ffaad953e9a8fe8f0a.zip | |
* Patches by Reinhard Meyer, 14 Feb 2004:
- update board/emk tree; use common flash driver
- Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c
[adapted for other PPC CPUs -- wd]
- Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c
* Patch by Jon Diekema, 13 Feb 2004:
Call show_boot_progress() whenever POST "FAILED" is printed.
* Patch by Nishant Kamat, 13 Feb 2004:
Add support for TI OMAP1610 H2 Board
Fixes for cpu/arm926ejs/interrupt.c
(based on Richard Woodruff's patch for arm925, 16 Oct 03)
Fix for a timer bug in OMAP1610 Innovator
Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2
* Patches by Stephan Linz, 12 Feb 2004:
- add support for NIOS timer with variable period preload counter value
- prepare POST framework support for NIOS targets
* Patch by Denis Peter, 11 Feb 2004:
add POST support for the MIP405 board
Diffstat (limited to 'include/configs/TOP5200.h')
| -rw-r--r-- | include/configs/TOP5200.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h index 8ff264b6af..bdb7a46d89 100644 --- a/include/configs/TOP5200.h +++ b/include/configs/TOP5200.h @@ -314,7 +314,19 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_RTC_MPC5200 1 /* use 5200 RTC */ +#ifdef CONFIG_EVAL5200 /* M48T08 is available with the Evaluation board only */ + #define CONFIG_RTC_MK48T59 1 /* use M48T08 on EVAL5200 */ + #define RTC(reg) (0xf0010000+reg) + /* setup CS2 for M48T08. Must MAP 64kB */ + #define CFG_CS2_START RTC(0) + #define CFG_CS2_SIZE 0x10000 + /* setup CS2 configuration register: */ + /* WaitP = 0, WaitX = 4, MX=0, AL=1, AA=1, CE=1 */ + /* AS=2, DS=0, Bank=0, WTyp=0, WS=0, RS=0, WO=0, RO=0 */ + #define CFG_CS2_CFG 0x00047800 +#else + #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */ +#endif /* * Various low-level settings |
