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authorWolfgang Denk <wd@denx.de>2010-07-16 23:15:01 +0200
committerWolfgang Denk <wd@denx.de>2010-07-16 23:15:01 +0200
commitb6c208ab1ebc2ac01e0029b8456210617ff67156 (patch)
tree65c1252178febcb70a5fc75e67748ceec8fe96e5 /drivers
parent16909f34b76e89871c0da528d6fe2ebf4e32231e (diff)
parent9f43d7997e9c5395eed4eddd32cd75942896a412 (diff)
downloadblackbird-obmc-uboot-b6c208ab1ebc2ac01e0029b8456210617ff67156.tar.gz
blackbird-obmc-uboot-b6c208ab1ebc2ac01e0029b8456210617ff67156.zip
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'drivers')
-rw-r--r--drivers/misc/fsl_law.c131
-rw-r--r--drivers/mtd/nand/fsl_elbc_nand.c18
2 files changed, 61 insertions, 88 deletions
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 8255175d2a..628bd5964c 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -50,86 +50,61 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
#ifdef CONFIG_FSL_CORENET
-void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
-{
- volatile ccsr_local_t *ccm = (void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
-
- gd->used_laws |= (1 << idx);
+#define LAW_BASE (CONFIG_SYS_FSL_CORENET_CCM_ADDR)
+#define LAWAR_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawar)
+#define LAWBARH_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarh)
+#define LAWBARL_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarl)
+#define LAWBAR_SHIFT 0
+#else
+#define LAW_BASE (CONFIG_SYS_IMMR + 0xc08)
+#define LAWAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x + 2)
+#define LAWBAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x)
+#define LAWBAR_SHIFT 12
+#endif
- out_be32(&ccm->law[idx].lawar, 0);
- out_be32(&ccm->law[idx].lawbarh, ((u64)addr >> 32));
- out_be32(&ccm->law[idx].lawbarl, addr & 0xffffffff);
- out_be32(&ccm->law[idx].lawar, LAW_EN | ((u32)id << 20) | (u32)sz);
- /* Read back so that we sync the writes */
- in_be32(&ccm->law[idx].lawar);
-}
-
-void disable_law(u8 idx)
+static inline phys_addr_t get_law_base_addr(int idx)
{
- volatile ccsr_local_t *ccm = (void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
-
- gd->used_laws &= ~(1 << idx);
-
- out_be32(&ccm->law[idx].lawar, 0);
- out_be32(&ccm->law[idx].lawbarh, 0);
- out_be32(&ccm->law[idx].lawbarl, 0);
-
- /* Read back so that we sync the writes */
- in_be32(&ccm->law[idx].lawar);
-
- return;
+#ifdef CONFIG_FSL_CORENET
+ return (phys_addr_t)
+ ((u64)in_be32(LAWBARH_ADDR(idx)) << 32) |
+ in_be32(LAWBARL_ADDR(idx));
+#else
+ return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT;
+#endif
}
-#ifndef CONFIG_NAND_SPL
-static int get_law_entry(u8 i, struct law_entry *e)
+static inline void set_law_base_addr(int idx, phys_addr_t addr)
{
- volatile ccsr_local_t *ccm = (void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
- u32 lawar;
-
- lawar = in_be32(&ccm->law[i].lawar);
-
- if (!(lawar & LAW_EN))
- return 0;
-
- e->addr = ((u64)in_be32(&ccm->law[i].lawbarh) << 32) |
- in_be32(&ccm->law[i].lawbarl);
- e->size = lawar & 0x3f;
- e->trgt_id = (lawar >> 20) & 0xff;
-
- return 1;
-}
-#endif
+#ifdef CONFIG_FSL_CORENET
+ out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff);
+ out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32);
#else
+ out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT);
+#endif
+}
+
void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
- volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
- volatile u32 *lawbar = base + 8 * idx;
- volatile u32 *lawar = base + 8 * idx + 2;
-
gd->used_laws |= (1 << idx);
- out_be32(lawar, 0);
- out_be32(lawbar, addr >> 12);
- out_be32(lawar, LAW_EN | ((u32)id << 20) | (u32)sz);
+ out_be32(LAWAR_ADDR(idx), 0);
+ set_law_base_addr(idx, addr);
+ out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id << 20) | (u32)sz);
/* Read back so that we sync the writes */
- in_be32(lawar);
+ in_be32(LAWAR_ADDR(idx));
}
void disable_law(u8 idx)
{
- volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
- volatile u32 *lawbar = base + 8 * idx;
- volatile u32 *lawar = base + 8 * idx + 2;
-
gd->used_laws &= ~(1 << idx);
- out_be32(lawar, 0);
- out_be32(lawbar, 0);
+ out_be32(LAWAR_ADDR(idx), 0);
+ set_law_base_addr(idx, 0);
/* Read back so that we sync the writes */
- in_be32(lawar);
+ in_be32(LAWAR_ADDR(idx));
return;
}
@@ -137,24 +112,20 @@ void disable_law(u8 idx)
#ifndef CONFIG_NAND_SPL
static int get_law_entry(u8 i, struct law_entry *e)
{
- volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
- volatile u32 *lawbar = base + 8 * i;
- volatile u32 *lawar = base + 8 * i + 2;
- u32 temp;
+ u32 lawar;
- temp = in_be32(lawar);
+ lawar = in_be32(LAWAR_ADDR(i));
- if (!(temp & LAW_EN))
+ if (!(lawar & LAW_EN))
return 0;
- e->addr = (u64)in_be32(lawbar) << 12;
- e->size = temp & 0x3f;
- e->trgt_id = (temp >> 20) & 0xff;
+ e->addr = get_law_base_addr(i);
+ e->size = lawar & 0x3f;
+ e->trgt_id = (lawar >> 20) & 0xff;
return 1;
}
#endif
-#endif
int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
@@ -216,17 +187,23 @@ struct law_entry find_law(phys_addr_t addr)
void print_laws(void)
{
- volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
- volatile u32 *lawbar = base;
- volatile u32 *lawar = base + 2;
int i;
+ u32 lawar;
printf("\nLocal Access Window Configuration\n");
- for(i = 0; i < FSL_HW_NUM_LAWS; i++) {
- printf("\tLAWBAR%d : 0x%08x, LAWAR%d : 0x%08x\n",
- i, in_be32(lawbar), i, in_be32(lawar));
- lawbar += 8;
- lawar += 8;
+ for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
+ lawar = in_be32(LAWAR_ADDR(i));
+#ifdef CONFIG_FSL_CORENET
+ printf("LAWBARH%02d: 0x%08x LAWBARL%02d: 0x%08x",
+ i, in_be32(LAWBARH_ADDR(i)),
+ i, in_be32(LAWBARL_ADDR(i)));
+#else
+ printf("LAWBAR%02d: 0x%08x", i, in_be32(LAWBAR_ADDR(i)));
+#endif
+ printf(" LAWAR0x%02d: 0x%08x\n", i, lawar);
+ printf("\t(EN: %d TGT: 0x%02x SIZE: ",
+ (lawar & LAW_EN) ? 1 : 0, (lawar >> 20) & 0xff);
+ print_size(lawar_size(lawar), ")\n");
}
return;
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 146e9bf3cb..acdb43112a 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -75,7 +75,7 @@ struct fsl_elbc_ctrl {
struct fsl_elbc_mtd *chips[MAX_BANKS];
/* device info */
- fsl_lbus_t *regs;
+ fsl_lbc_t *regs;
u8 __iomem *addr; /* Address of assigned FCM buffer */
unsigned int page; /* Last page written to / read from */
unsigned int read_bytes; /* Number of bytes read during command */
@@ -171,7 +171,7 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)
struct nand_chip *chip = mtd->priv;
struct fsl_elbc_mtd *priv = chip->priv;
struct fsl_elbc_ctrl *ctrl = priv->ctrl;
- fsl_lbus_t *lbc = ctrl->regs;
+ fsl_lbc_t *lbc = ctrl->regs;
int buf_num;
ctrl->page = page_addr;
@@ -211,7 +211,7 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
struct nand_chip *chip = mtd->priv;
struct fsl_elbc_mtd *priv = chip->priv;
struct fsl_elbc_ctrl *ctrl = priv->ctrl;
- fsl_lbus_t *lbc = ctrl->regs;
+ fsl_lbc_t *lbc = ctrl->regs;
long long end_tick;
u32 ltesr;
@@ -261,7 +261,7 @@ static void fsl_elbc_do_read(struct nand_chip *chip, int oob)
{
struct fsl_elbc_mtd *priv = chip->priv;
struct fsl_elbc_ctrl *ctrl = priv->ctrl;
- fsl_lbus_t *lbc = ctrl->regs;
+ fsl_lbc_t *lbc = ctrl->regs;
if (priv->page_size) {
out_be32(&lbc->fir,
@@ -295,7 +295,7 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
struct nand_chip *chip = mtd->priv;
struct fsl_elbc_mtd *priv = chip->priv;
struct fsl_elbc_ctrl *ctrl = priv->ctrl;
- fsl_lbus_t *lbc = ctrl->regs;
+ fsl_lbc_t *lbc = ctrl->regs;
ctrl->use_mdr = 0;
@@ -633,7 +633,7 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
{
struct fsl_elbc_mtd *priv = chip->priv;
struct fsl_elbc_ctrl *ctrl = priv->ctrl;
- fsl_lbus_t *lbc = ctrl->regs;
+ fsl_lbc_t *lbc = ctrl->regs;
if (ctrl->status != LTESR_CC)
return NAND_STATUS_FAIL;
@@ -697,11 +697,7 @@ static void fsl_elbc_ctrl_init(void)
if (!elbc_ctrl)
return;
-#ifdef CONFIG_MPC85xx
- elbc_ctrl->regs = (void *)CONFIG_SYS_MPC85xx_LBC_ADDR;
-#else
- elbc_ctrl->regs = &((immap_t *)CONFIG_SYS_IMMR)->lbus;
-#endif
+ elbc_ctrl->regs = LBC_BASE_ADDR;
/* clear event registers */
out_be32(&elbc_ctrl->regs->ltesr, LTESR_NAND_MASK);
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