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authorBin Meng <bmeng.cn@gmail.com>2015-02-04 16:26:12 +0800
committerSimon Glass <sjg@chromium.org>2015-02-06 12:07:45 -0700
commit728b393f3b012ac46505151b80af1d4334786845 (patch)
treef7a9eaa7476cad5432886ee7d121044d7adc035a /drivers
parent38fc1cdae0fb7a429222b7b85f8cdaefbd078e21 (diff)
downloadblackbird-obmc-uboot-728b393f3b012ac46505151b80af1d4334786845.tar.gz
blackbird-obmc-uboot-728b393f3b012ac46505151b80af1d4334786845.zip
x86: Add SPI support to quark/galileo
The Quark SoC contains a legacy SPI controller in the legacy bridge which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS control register offset in the ICH SPI driver is wrong for the Quark SoC too, unprotect_spi_flash() is added to enable the flash write. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/ich.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index da857791e0..194e882302 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -177,7 +177,8 @@ void spi_free_slave(struct spi_slave *slave)
static int get_ich_version(uint16_t device_id)
{
if (device_id == PCI_DEVICE_ID_INTEL_TGP_LPC ||
- device_id == PCI_DEVICE_ID_INTEL_ITC_LPC)
+ device_id == PCI_DEVICE_ID_INTEL_ITC_LPC ||
+ device_id == PCI_DEVICE_ID_INTEL_QRK_ILB)
return 7;
if ((device_id >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN &&
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