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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-11-24 13:31:17 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-12-01 06:23:51 -0700 |
| commit | 9ca07ebbac3c94974db75e25004203289d9013bc (patch) | |
| tree | 71505c28b02624db37f3edacd631af87ea08feef /drivers/timer | |
| parent | f838f124522ea4fb5202c1b584b4706aa48ee144 (diff) | |
| download | blackbird-obmc-uboot-9ca07ebbac3c94974db75e25004203289d9013bc.tar.gz blackbird-obmc-uboot-9ca07ebbac3c94974db75e25004203289d9013bc.zip | |
dm: timer: Support 64-bit counter
There are timers with a 64-bit counter value but current timer
uclass driver assumes a 32-bit one. Modify timer_get_count()
to ask timer driver to always return a 64-bit counter value,
and provide an inline helper function timer_conv_64() to handle
the 32-bit/64-bit conversion automatically.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/timer')
| -rw-r--r-- | drivers/timer/altera_timer.c | 4 | ||||
| -rw-r--r-- | drivers/timer/sandbox_timer.c | 2 | ||||
| -rw-r--r-- | drivers/timer/timer-uclass.c | 15 |
3 files changed, 15 insertions, 6 deletions
diff --git a/drivers/timer/altera_timer.c b/drivers/timer/altera_timer.c index 2364f1b00f..89fe05b704 100644 --- a/drivers/timer/altera_timer.c +++ b/drivers/timer/altera_timer.c @@ -34,7 +34,7 @@ struct altera_timer_platdata { struct altera_timer_regs *regs; }; -static int altera_timer_get_count(struct udevice *dev, unsigned long *count) +static int altera_timer_get_count(struct udevice *dev, u64 *count) { struct altera_timer_platdata *plat = dev->platdata; struct altera_timer_regs *const regs = plat->regs; @@ -46,7 +46,7 @@ static int altera_timer_get_count(struct udevice *dev, unsigned long *count) /* Read timer value */ val = readl(®s->snapl) & 0xffff; val |= (readl(®s->snaph) & 0xffff) << 16; - *count = ~val; + *count = timer_conv_64(~val); return 0; } diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c index 4b20af2228..00a9944f78 100644 --- a/drivers/timer/sandbox_timer.c +++ b/drivers/timer/sandbox_timer.c @@ -18,7 +18,7 @@ void sandbox_timer_add_offset(unsigned long offset) sandbox_timer_offset += offset; } -static int sandbox_timer_get_count(struct udevice *dev, unsigned long *count) +static int sandbox_timer_get_count(struct udevice *dev, u64 *count) { *count = os_get_nsec() / 1000 + sandbox_timer_offset * 1000; diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c index 02185912d5..aca421bdea 100644 --- a/drivers/timer/timer-uclass.c +++ b/drivers/timer/timer-uclass.c @@ -13,14 +13,14 @@ DECLARE_GLOBAL_DATA_PTR; /* * Implement a timer uclass to work with lib/time.c. The timer is usually - * a 32 bits free-running up counter. The get_rate() method is used to get + * a 32/64 bits free-running up counter. The get_rate() method is used to get * the input clock frequency of the timer. The get_count() method is used - * to get the current 32 bits count value. If the hardware is counting down, + * to get the current 64 bits count value. If the hardware is counting down, * the value should be inversed inside the method. There may be no real * tick, and no timer interrupt. */ -int timer_get_count(struct udevice *dev, unsigned long *count) +int timer_get_count(struct udevice *dev, u64 *count) { const struct timer_ops *ops = device_get_ops(dev); @@ -47,6 +47,15 @@ static int timer_pre_probe(struct udevice *dev) return 0; } +u64 timer_conv_64(u32 count) +{ + /* increment tbh if tbl has rolled over */ + if (count < gd->timebase_l) + gd->timebase_h++; + gd->timebase_l = count; + return ((u64)gd->timebase_h << 32) | gd->timebase_l; +} + UCLASS_DRIVER(timer) = { .id = UCLASS_TIMER, .name = "timer", |
