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authorPurna Chandra Mandal <purna.mandal@microchip.com>2016-06-02 14:26:08 +0530
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2016-06-10 12:31:12 +0200
commite19b9004575cacf1f64fff894621adafe0e7ea7f (patch)
tree2e282e236e11d6e43f4291b25dbe53d5ff89f982 /drivers/spi/zynq_qspi.c
parent4b7b0a0f0635c1d1e4a0ae2ed172530b5f78e74b (diff)
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spi: pic32_spi: add SPI master driver for PIC32 SoC.
This driver implements SPI protocol in master mode to communicate with the SPI device connected on SPI bus. It handles /CS explicitly by controlling respective pin as gpio ('cs-gpios' property in dt node) and uses PIO mode for SPI transaction. It is configurable based on driver-model only. Cc: Jagan Teki <jteki@openedev.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'drivers/spi/zynq_qspi.c')
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