diff options
| author | Marek Vasut <marex@denx.de> | 2015-07-12 20:49:39 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:11 +0200 |
| commit | 6cb9f167817a30b9d8d482023164d4a3ca458501 (patch) | |
| tree | 7491db143165a844a1091e3478fab78e7f6098c8 /drivers/ddr | |
| parent | 17fdc9167fd8598d49f8edc930a5e5e649bd1299 (diff) | |
| download | blackbird-obmc-uboot-6cb9f167817a30b9d8d482023164d4a3ca458501.tar.gz blackbird-obmc-uboot-6cb9f167817a30b9d8d482023164d4a3ca458501.zip | |
ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directly
Use the proper structure which describes these registers,
especially since this is already in place.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/altera/sequencer.c | 20 | ||||
| -rw-r--r-- | drivers/ddr/altera/sequencer.h | 4 |
2 files changed, 9 insertions, 15 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 591e8f6776..9b9b65e7a1 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -36,6 +36,9 @@ static struct socfpga_phy_mgr_cfg *phy_mgr_cfg = static struct socfpga_data_mgr *data_mgr = (struct socfpga_data_mgr *)SDR_PHYGRP_DATAMGRGRP_ADDRESS; +static struct socfpga_sdr_ctrl *sdr_ctrl = + (struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS; + #define DELTA_D 1 /* @@ -3678,12 +3681,10 @@ static uint32_t run_mem_calibrate(void) addr = (u32)&phy_mgr_cfg->cal_status; writel(PHY_MGR_CAL_RESET, addr); - addr = SDR_CTRLGRP_ADDRESS; /* stop tracking manger */ - uint32_t ctrlcfg = readl(addr); + uint32_t ctrlcfg = readl(&sdr_ctrl->ctrl_cfg); - addr = SDR_CTRLGRP_ADDRESS; - writel(ctrlcfg & 0xFFBFFFFF, addr); + writel(ctrlcfg & 0xFFBFFFFF, &sdr_ctrl->ctrl_cfg); initialize(); rw_mgr_mem_initialize(); @@ -3709,8 +3710,7 @@ static uint32_t run_mem_calibrate(void) writel(0x2, addr); } - addr = SDR_CTRLGRP_ADDRESS; - writel(ctrlcfg, addr); + writel(ctrlcfg, &sdr_ctrl->ctrl_cfg); if (pass) { printf("%s: CALIBRATION PASSED\n", __FILE__); @@ -3807,7 +3807,6 @@ static void initialize_reg_file(void) static void initialize_hps_phy(void) { uint32_t reg; - uint32_t addr; /* * Tracking also gets configured here because it's in the * same register. @@ -3833,8 +3832,7 @@ static void initialize_hps_phy(void) reg |= SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ADDLATSEL_SET(0); reg |= SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_SET( trk_sample_count); - addr = SDR_CTRLGRP_ADDRESS; - writel(reg, addr + SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_OFFSET); + writel(reg, &sdr_ctrl->phy_ctrl0); reg = 0; reg |= SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_SAMPLECOUNT_31_20_SET( @@ -3842,13 +3840,13 @@ static void initialize_hps_phy(void) SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_WIDTH); reg |= SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_SET( trk_long_idle_sample_count); - writel(reg, addr + SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_OFFSET); + writel(reg, &sdr_ctrl->phy_ctrl1); reg = 0; reg |= SDR_CTRLGRP_PHYCTRL_PHYCTRL_2_LONGIDLESAMPLECOUNT_31_20_SET( trk_long_idle_sample_count >> SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_WIDTH); - writel(reg, addr + SDR_CTRLGRP_PHYCTRL_PHYCTRL_2_OFFSET); + writel(reg, &sdr_ctrl->phy_ctrl2); } static void initialize_tracking(void) diff --git a/drivers/ddr/altera/sequencer.h b/drivers/ddr/altera/sequencer.h index 7591d40728..5d4d80016d 100644 --- a/drivers/ddr/altera/sequencer.h +++ b/drivers/ddr/altera/sequencer.h @@ -99,10 +99,6 @@ #define SDR_PHYGRP_DATAMGRGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x4000) #define SDR_PHYGRP_REGFILEGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x4800) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_OFFSET 0x150 -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_OFFSET 0x154 -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_2_OFFSET 0x158 - #define PHY_MGR_CAL_RESET (0) #define PHY_MGR_CAL_SUCCESS (1) #define PHY_MGR_CAL_FAIL (2) |
