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authorKumar Gala <galak@kernel.crashing.org>2009-09-11 12:32:01 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-09-15 21:30:09 -0500
commitb2eec281a811bb52941f61203d8fe35256b3582c (patch)
treebd0e0e05310b6c9e2645ec1f91f8fb8196e00b13 /cpu
parent206af3527c05e520e28d38a48a1d15433e34675d (diff)
downloadblackbird-obmc-uboot-b2eec281a811bb52941f61203d8fe35256b3582c.tar.gz
blackbird-obmc-uboot-b2eec281a811bb52941f61203d8fe35256b3582c.zip
ppc/85xx: Move code around to prep for NAND_SPL
If we move some of the functions in tlb.c around we need less ifdefs. The first stage loader just needs invalidate_tlb and init_tlbs. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc85xx/tlb.c46
1 files changed, 23 insertions, 23 deletions
diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c
index f87a10d4f4..44e80b1b74 100644
--- a/cpu/mpc85xx/tlb.c
+++ b/cpu/mpc85xx/tlb.c
@@ -32,6 +32,29 @@
DECLARE_GLOBAL_DATA_PTR;
+void invalidate_tlb(u8 tlb)
+{
+ if (tlb == 0)
+ mtspr(MMUCSR0, 0x4);
+ if (tlb == 1)
+ mtspr(MMUCSR0, 0x2);
+}
+
+void init_tlbs(void)
+{
+ int i;
+
+ for (i = 0; i < num_tlb_entries; i++) {
+ write_tlb(tlb_table[i].mas0,
+ tlb_table[i].mas1,
+ tlb_table[i].mas2,
+ tlb_table[i].mas3,
+ tlb_table[i].mas7);
+ }
+
+ return ;
+}
+
void set_tlb(u8 tlb, u32 epn, u64 rpn,
u8 perms, u8 wimge,
u8 ts, u8 esel, u8 tsize, u8 iprot)
@@ -77,29 +100,6 @@ void disable_tlb(u8 esel)
#endif
}
-void invalidate_tlb(u8 tlb)
-{
- if (tlb == 0)
- mtspr(MMUCSR0, 0x4);
- if (tlb == 1)
- mtspr(MMUCSR0, 0x2);
-}
-
-void init_tlbs(void)
-{
- int i;
-
- for (i = 0; i < num_tlb_entries; i++) {
- write_tlb(tlb_table[i].mas0,
- tlb_table[i].mas1,
- tlb_table[i].mas2,
- tlb_table[i].mas3,
- tlb_table[i].mas7);
- }
-
- return ;
-}
-
static void tlbsx (const volatile unsigned *addr)
{
__asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr));
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